{"id":"https://openalex.org/W3147663759","doi":"https://doi.org/10.1109/date.2012.6176553","title":"An instruction scratchpad memory allocation for the precision timed architecture","display_name":"An instruction scratchpad memory allocation for the precision timed architecture","publication_year":2012,"publication_date":"2012-03-01","ids":{"openalex":"https://openalex.org/W3147663759","doi":"https://doi.org/10.1109/date.2012.6176553","mag":"3147663759"},"language":"en","primary_location":{"id":"doi:10.1109/date.2012.6176553","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2012.6176553","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 Design, Automation & Test in Europe Conference & Exhibition (DATE)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5075487629","display_name":"Amit Prakash","orcid":"https://orcid.org/0000-0002-0494-8689"},"institutions":[{"id":"https://openalex.org/I151746483","display_name":"University of Waterloo","ror":"https://ror.org/01aff2v68","country_code":"CA","type":"education","lineage":["https://openalex.org/I151746483"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"A. Prakash","raw_affiliation_strings":["Electrical and Computer Engineering, University of Waterloo, Waterloo, ONT, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering, University of Waterloo, Waterloo, ONT, Canada","institution_ids":["https://openalex.org/I151746483"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5074065388","display_name":"Hiren Patel","orcid":"https://orcid.org/0000-0003-2750-4471"},"institutions":[{"id":"https://openalex.org/I151746483","display_name":"University of Waterloo","ror":"https://ror.org/01aff2v68","country_code":"CA","type":"education","lineage":["https://openalex.org/I151746483"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"H. D. Patel","raw_affiliation_strings":["Electrical and Computer Engineering, University of Waterloo, Waterloo, ONT, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering, University of Waterloo, Waterloo, ONT, Canada","institution_ids":["https://openalex.org/I151746483"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I151746483"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":"807","issue":null,"first_page":"659","last_page":"664"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.9037301540374756},{"id":"https://openalex.org/keywords/register-allocation","display_name":"Register allocation","score":0.7144208550453186},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.5857585072517395},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5636939406394958},{"id":"https://openalex.org/keywords/control-flow-graph","display_name":"Control flow graph","score":0.5078268647193909},{"id":"https://openalex.org/keywords/control-flow","display_name":"Control flow","score":0.4978318214416504},{"id":"https://openalex.org/keywords/scheme","display_name":"Scheme (mathematics)","score":0.450287401676178},{"id":"https://openalex.org/keywords/binary-number","display_name":"Binary number","score":0.4309687614440918},{"id":"https://openalex.org/keywords/integer","display_name":"Integer (computer science)","score":0.42017969489097595},{"id":"https://openalex.org/keywords/graph","display_name":"Graph","score":0.4188104271888733},{"id":"https://openalex.org/keywords/integer-programming","display_name":"Integer programming","score":0.4114260673522949},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.26678311824798584},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.21977511048316956},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.21658948063850403},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.1310303509235382},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.12486961483955383},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.11510014533996582}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.9037301540374756},{"id":"https://openalex.org/C128916667","wikidata":"https://www.wikidata.org/wiki/Q1343660","display_name":"Register allocation","level":3,"score":0.7144208550453186},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.5857585072517395},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5636939406394958},{"id":"https://openalex.org/C27458966","wikidata":"https://www.wikidata.org/wiki/Q1187693","display_name":"Control flow graph","level":2,"score":0.5078268647193909},{"id":"https://openalex.org/C160191386","wikidata":"https://www.wikidata.org/wiki/Q868299","display_name":"Control flow","level":2,"score":0.4978318214416504},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.450287401676178},{"id":"https://openalex.org/C48372109","wikidata":"https://www.wikidata.org/wiki/Q3913","display_name":"Binary number","level":2,"score":0.4309687614440918},{"id":"https://openalex.org/C97137487","wikidata":"https://www.wikidata.org/wiki/Q729138","display_name":"Integer (computer science)","level":2,"score":0.42017969489097595},{"id":"https://openalex.org/C132525143","wikidata":"https://www.wikidata.org/wiki/Q141488","display_name":"Graph","level":2,"score":0.4188104271888733},{"id":"https://openalex.org/C56086750","wikidata":"https://www.wikidata.org/wiki/Q6042592","display_name":"Integer programming","level":2,"score":0.4114260673522949},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.26678311824798584},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.21977511048316956},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.21658948063850403},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.1310303509235382},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.12486961483955383},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.11510014533996582},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/date.2012.6176553","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2012.6176553","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 Design, Automation & Test in Europe Conference & Exhibition (DATE)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W2010204191","https://openalex.org/W2061650414","https://openalex.org/W2076446845","https://openalex.org/W2102800454","https://openalex.org/W2118699129","https://openalex.org/W2122833539","https://openalex.org/W2123470671","https://openalex.org/W2146486934","https://openalex.org/W2158116338","https://openalex.org/W2167631583","https://openalex.org/W6653015673"],"related_works":["https://openalex.org/W2047683846","https://openalex.org/W2044902158","https://openalex.org/W2138385884","https://openalex.org/W2109912052","https://openalex.org/W1711527768","https://openalex.org/W59945861","https://openalex.org/W2166895275","https://openalex.org/W2998775986","https://openalex.org/W157564837","https://openalex.org/W2080313875"],"abstract_inverted_index":{"This":[0],"work":[1],"presents":[2],"a":[3,70,76,103,106],"static":[4],"instruction":[5],"allocation":[6,32,47,61,120],"scheme":[7,33],"for":[8,94],"the":[9,23,28,31,38,55,60,80,83,86,95,110,115,119],"precision":[10],"timed":[11],"architecture's":[12],"(PRET)":[13],"scratchpad":[14],"memory.":[15],"Since":[16],"PRET":[17,56,96],"provides":[18],"timing":[19],"instructions":[20,49],"to":[21,35,113],"control":[22],"temporal":[24,41],"execution":[25],"of":[26,30,54,105,109,117],"programs,":[27],"objective":[29],"is":[34],"ensure":[36],"that":[37,72],"explicitly":[39],"specified":[40],"requirements":[42],"are":[43],"met.":[44],"Furthermore,":[45],"this":[46],"incorporates":[48],"from":[50],"multiple":[51,122],"hardware":[52],"threads":[53],"architecture.":[57,97],"We":[58,98],"formulate":[59],"as":[62],"an":[63,91],"integer-linear":[64],"programming":[65],"problem,":[66],"and":[67,89],"we":[68],"implement":[69],"tool":[71],"takes":[73],"binaries,":[74],"constructs":[75],"control-flow":[77],"graph,":[78],"performs":[79],"allocation,":[81,88],"rewrites":[82],"binary":[84,93],"with":[85],"new":[87],"generates":[90],"output":[92],"carry":[99],"out":[100],"experiments":[101],"on":[102],"subset":[104],"modified":[107],"version":[108],"Malardalen":[111],"benchmarks":[112],"show":[114],"benefits":[116],"performing":[118],"across":[121],"threads.":[123]},"counts_by_year":[{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}