{"id":"https://openalex.org/W4244990170","doi":"https://doi.org/10.1109/date.2012.6176427","title":"A clustering-based scheme for concurrent trace in debugging NoC-based multicore systems","display_name":"A clustering-based scheme for concurrent trace in debugging NoC-based multicore systems","publication_year":2012,"publication_date":"2012-03-01","ids":{"openalex":"https://openalex.org/W4244990170","doi":"https://doi.org/10.1109/date.2012.6176427"},"language":"en","primary_location":{"id":"doi:10.1109/date.2012.6176427","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2012.6176427","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 Design, Automation &amp; Test in Europe Conference &amp; Exhibition (DATE)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5060720664","display_name":"Jianliang Gao","orcid":"https://orcid.org/0000-0002-9363-9908"},"institutions":[{"id":"https://openalex.org/I139660479","display_name":"Central South University","ror":"https://ror.org/00f1zfq44","country_code":"CN","type":"education","lineage":["https://openalex.org/I139660479"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Jianliang Gao","raw_affiliation_strings":["School of Information Science and Engineering, Central South University, China"],"affiliations":[{"raw_affiliation_string":"School of Information Science and Engineering, Central South University, China","institution_ids":["https://openalex.org/I139660479"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100438360","display_name":"Jianxin Wang","orcid":"https://orcid.org/0000-0003-1516-0480"},"institutions":[{"id":"https://openalex.org/I139660479","display_name":"Central South University","ror":"https://ror.org/00f1zfq44","country_code":"CN","type":"education","lineage":["https://openalex.org/I139660479"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jianxin Wang","raw_affiliation_strings":["School of Information Science and Engineering, Central South University, China"],"affiliations":[{"raw_affiliation_string":"School of Information Science and Engineering, Central South University, China","institution_ids":["https://openalex.org/I139660479"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101129828","display_name":"Yinhe Han","orcid":"https://orcid.org/0009-0009-8044-6611"},"institutions":[{"id":"https://openalex.org/I4210090176","display_name":"Institute of Computing Technology","ror":"https://ror.org/0090r4d87","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210090176"]},{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"funder","lineage":["https://openalex.org/I19820366"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yinhe Han","raw_affiliation_strings":["Key Laboratory of Computer System and Architecture, Institute of Computing Technology, Chinese Academy of Sciences, China"],"affiliations":[{"raw_affiliation_string":"Key Laboratory of Computer System and Architecture, Institute of Computing Technology, Chinese Academy of Sciences, China","institution_ids":["https://openalex.org/I4210090176","https://openalex.org/I19820366"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5070840566","display_name":"Nevin L. Zhang","orcid":"https://orcid.org/0000-0002-4662-3217"},"institutions":[{"id":"https://openalex.org/I4210090176","display_name":"Institute of Computing Technology","ror":"https://ror.org/0090r4d87","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210090176"]},{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"funder","lineage":["https://openalex.org/I19820366"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Lei Zhang","raw_affiliation_strings":["Key Laboratory of Computer System and Architecture, Institute of Computing Technology, Chinese Academy of Sciences, China"],"affiliations":[{"raw_affiliation_string":"Key Laboratory of Computer System and Architecture, Institute of Computing Technology, Chinese Academy of Sciences, China","institution_ids":["https://openalex.org/I4210090176","https://openalex.org/I19820366"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5023380073","display_name":"Xiaowei Li","orcid":"https://orcid.org/0000-0002-0874-814X"},"institutions":[{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"funder","lineage":["https://openalex.org/I19820366"]},{"id":"https://openalex.org/I4210090176","display_name":"Institute of Computing Technology","ror":"https://ror.org/0090r4d87","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210090176"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xiaowei Li","raw_affiliation_strings":["Key Laboratory of Computer System and Architecture, Institute of Computing Technology, Chinese Academy of Sciences, China"],"affiliations":[{"raw_affiliation_string":"Key Laboratory of Computer System and Architecture, Institute of Computing Technology, Chinese Academy of Sciences, China","institution_ids":["https://openalex.org/I4210090176","https://openalex.org/I19820366"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5060720664"],"corresponding_institution_ids":["https://openalex.org/I139660479"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.46264253,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"27","last_page":"32"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9901999831199646,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9901999831199646,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10772","display_name":"Distributed systems and fault tolerance","score":0.9883000254631042,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9879000186920166,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8274886012077332},{"id":"https://openalex.org/keywords/debugging","display_name":"Debugging","score":0.7667880058288574},{"id":"https://openalex.org/keywords/trace","display_name":"TRACE (psycholinguistics)","score":0.7438362240791321},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.6459004878997803},{"id":"https://openalex.org/keywords/cluster-analysis","display_name":"Cluster analysis","score":0.6068222522735596},{"id":"https://openalex.org/keywords/bottleneck","display_name":"Bottleneck","score":0.6053348183631897},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.5346488356590271},{"id":"https://openalex.org/keywords/network-on-a-chip","display_name":"Network on a chip","score":0.4805234372615814},{"id":"https://openalex.org/keywords/scheme","display_name":"Scheme (mathematics)","score":0.4791402518749237},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4764041006565094},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.4384491741657257},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.39909282326698303},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.32946211099624634},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.15675941109657288},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.11212971806526184}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8274886012077332},{"id":"https://openalex.org/C168065819","wikidata":"https://www.wikidata.org/wiki/Q845566","display_name":"Debugging","level":2,"score":0.7667880058288574},{"id":"https://openalex.org/C75291252","wikidata":"https://www.wikidata.org/wiki/Q1315756","display_name":"TRACE (psycholinguistics)","level":2,"score":0.7438362240791321},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.6459004878997803},{"id":"https://openalex.org/C73555534","wikidata":"https://www.wikidata.org/wiki/Q622825","display_name":"Cluster analysis","level":2,"score":0.6068222522735596},{"id":"https://openalex.org/C2780513914","wikidata":"https://www.wikidata.org/wiki/Q18210350","display_name":"Bottleneck","level":2,"score":0.6053348183631897},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.5346488356590271},{"id":"https://openalex.org/C128519102","wikidata":"https://www.wikidata.org/wiki/Q339554","display_name":"Network on a chip","level":2,"score":0.4805234372615814},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.4791402518749237},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4764041006565094},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.4384491741657257},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.39909282326698303},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.32946211099624634},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.15675941109657288},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.11212971806526184},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C41895202","wikidata":"https://www.wikidata.org/wiki/Q8162","display_name":"Linguistics","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/date.2012.6176427","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2012.6176427","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 Design, Automation &amp; Test in Europe Conference &amp; Exhibition (DATE)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W2006591276","https://openalex.org/W2090692734","https://openalex.org/W2123336842","https://openalex.org/W2137123439","https://openalex.org/W2143505582","https://openalex.org/W2143592276","https://openalex.org/W2161957517","https://openalex.org/W2165139922","https://openalex.org/W2168098726","https://openalex.org/W3140261852","https://openalex.org/W4212932124","https://openalex.org/W4237135760","https://openalex.org/W6678402164"],"related_works":["https://openalex.org/W1657880117","https://openalex.org/W2595172197","https://openalex.org/W2127970246","https://openalex.org/W2084856301","https://openalex.org/W1001352512","https://openalex.org/W4382618745","https://openalex.org/W2885125400","https://openalex.org/W2114320580","https://openalex.org/W4212932124","https://openalex.org/W2360310172"],"abstract_inverted_index":{"Concurrent":[0],"trace":[1,13,20,41,54,87,92],"is":[2,33,77],"an":[3],"emerging":[4],"challenge":[5],"when":[6],"debugging":[7,56],"multicore":[8,60],"systems.":[9,61],"In":[10,27,43,62],"concurrent":[11,53,86],"trace,":[12],"buffer":[14,93],"becomes":[15],"a":[16,48,66],"bottleneck":[17],"since":[18],"all":[19],"sources":[21,88],"try":[22],"to":[23],"access":[24,90],"it":[25],"simultaneously.":[26],"addition,":[28],"the":[29,39,63,71,101,107,110,113],"on-chip":[30],"interconnection":[31,74],"fabric":[32,75],"extremely":[34],"high":[35],"hardware":[36],"cost":[37],"for":[38,55,73],"distributed":[40,91],"signals.":[42],"this":[44],"paper,":[45],"we":[46],"propose":[47],"clustering-based":[49],"scheme":[50,103],"which":[51,76],"implements":[52],"Network-on-Chip":[57],"(NoC)":[58],"based":[59],"proposed":[64,102,114],"scheme,":[65,84],"unified":[67],"communication":[68],"framework":[69],"eliminates":[70],"requirement":[72],"only":[78],"used":[79],"during":[80],"debugging.":[81],"With":[82],"clustering":[83],"multiple":[85],"can":[89],"via":[94],"NoC":[95],"under":[96],"bandwidth":[97],"constraint.":[98],"We":[99],"evaluate":[100],"using":[104],"Booksim":[105],"and":[106],"results":[108],"show":[109],"effectiveness":[111],"of":[112],"scheme.":[115]},"counts_by_year":[{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
