{"id":"https://openalex.org/W2148292098","doi":"https://doi.org/10.1109/date.2011.5763293","title":"Power reduction via near-optimal library-based cell-size selection","display_name":"Power reduction via near-optimal library-based cell-size selection","publication_year":2011,"publication_date":"2011-03-01","ids":{"openalex":"https://openalex.org/W2148292098","doi":"https://doi.org/10.1109/date.2011.5763293","mag":"2148292098"},"language":"en","primary_location":{"id":"doi:10.1109/date.2011.5763293","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2011.5763293","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 Design, Automation &amp; Test in Europe","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5091695146","display_name":"Md Tauhidur Rahman","orcid":"https://orcid.org/0000-0002-0010-6388"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"M Rahman","raw_affiliation_strings":["Department of Electrical Engineering, University of Texas, Dallas, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, University of Texas, Dallas, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5039828535","display_name":"H. Tennakoon","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"H Tennakoon","raw_affiliation_strings":["Department of Electrical Engineering, University of Texas, Dallas, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, University of Texas, Dallas, USA","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5072362007","display_name":"C. Sechen","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"C Sechen","raw_affiliation_strings":["Department of Electrical Engineering, University of Texas, Dallas, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, University of Texas, Dallas, USA","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":0,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":7.6076,"has_fulltext":false,"cited_by_count":25,"citation_normalized_percentile":{"value":0.98236261,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/minification","display_name":"Minification","score":0.7261315584182739},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.6889756917953491},{"id":"https://openalex.org/keywords/selection","display_name":"Selection (genetic algorithm)","score":0.5690020322799683},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.558148980140686},{"id":"https://openalex.org/keywords/dynamic-demand","display_name":"Dynamic demand","score":0.536666989326477},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.5362657308578491},{"id":"https://openalex.org/keywords/mathematical-optimization","display_name":"Mathematical optimization","score":0.5120459198951721},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.4679597318172455},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.36833736300468445},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.27950671315193176},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.16038092970848083},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.09728303551673889},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.08889120817184448}],"concepts":[{"id":"https://openalex.org/C147764199","wikidata":"https://www.wikidata.org/wiki/Q6865248","display_name":"Minification","level":2,"score":0.7261315584182739},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.6889756917953491},{"id":"https://openalex.org/C81917197","wikidata":"https://www.wikidata.org/wiki/Q628760","display_name":"Selection (genetic algorithm)","level":2,"score":0.5690020322799683},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.558148980140686},{"id":"https://openalex.org/C45872418","wikidata":"https://www.wikidata.org/wiki/Q5318966","display_name":"Dynamic demand","level":3,"score":0.536666989326477},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.5362657308578491},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.5120459198951721},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.4679597318172455},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.36833736300468445},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.27950671315193176},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.16038092970848083},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.09728303551673889},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.08889120817184448},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/date.2011.5763293","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2011.5763293","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 Design, Automation &amp; Test in Europe","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W2088115909","https://openalex.org/W2097749440","https://openalex.org/W2130675388","https://openalex.org/W2141907973","https://openalex.org/W2143022706","https://openalex.org/W2163724426","https://openalex.org/W2165214930","https://openalex.org/W2274527110","https://openalex.org/W2296319761","https://openalex.org/W3201393311","https://openalex.org/W4231119589"],"related_works":["https://openalex.org/W4205762803","https://openalex.org/W2535856026","https://openalex.org/W2532234348","https://openalex.org/W2265065644","https://openalex.org/W2134699697","https://openalex.org/W108084911","https://openalex.org/W2322875716","https://openalex.org/W2468698815","https://openalex.org/W2383516975","https://openalex.org/W2374878784"],"abstract_inverted_index":{"Assuming":[0],"continuous":[1,39,63],"cell":[2,49],"sizes":[3,14,40,44],"we":[4],"have":[5],"robustly":[6],"achieved":[7],"global":[8],"minimization":[9],"of":[10,73,85],"the":[11,38,42,47,61,71],"total":[12],"transistor":[13],"needed":[15],"to":[16,41,60],"achieve":[17],"a":[18,32,54,81],"delay":[19],"goal,":[20],"thus":[21],"minimizing":[22],"dynamic":[23,82],"power":[24,83],"(and":[25],"reducing":[26],"leakage":[27],"power).":[28],"We":[29],"then":[30],"developed":[31],"feasible":[33],"branch-and-bound":[34],"algorithm":[35],"that":[36,53],"maps":[37],"discrete":[43,75],"available":[45],"in":[46,80],"standard":[48],"library.":[50],"Results":[51],"show":[52],"typical":[55],"library":[56],"gives":[57],"results":[58,79],"close":[59],"optimal":[62],"size":[64,76],"results.":[65],"After":[66],"using":[67],"state-of-the-art":[68],"commercial":[69],"synthesis,":[70],"application":[72],"our":[74],"selection":[77],"tool":[78],"reduction":[84],"40%":[86],"(on":[87],"average)":[88],"for":[89],"large":[90],"industrial":[91],"designs.":[92]},"counts_by_year":[{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":4},{"year":2012,"cited_by_count":7}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
