{"id":"https://openalex.org/W2118578839","doi":"https://doi.org/10.1109/date.2011.5763223","title":"Realistic performance-constrained pipelining in high-level synthesis","display_name":"Realistic performance-constrained pipelining in high-level synthesis","publication_year":2011,"publication_date":"2011-03-01","ids":{"openalex":"https://openalex.org/W2118578839","doi":"https://doi.org/10.1109/date.2011.5763223","mag":"2118578839"},"language":"en","primary_location":{"id":"doi:10.1109/date.2011.5763223","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2011.5763223","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 Design, Automation &amp; Test in Europe","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"http://porto.polito.it/2501070/1/pipe_formatted.pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5069752974","display_name":"A. Kondratyev","orcid":null},"institutions":[{"id":"https://openalex.org/I66217453","display_name":"Cadence Design Systems (United States)","ror":"https://ror.org/04w8xa018","country_code":"US","type":"company","lineage":["https://openalex.org/I66217453"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"A Kondratyev","raw_affiliation_strings":["Cadence Design Systems, San Jose, USA","Cadence Design Systems, San Jose, USA#TAB#"],"affiliations":[{"raw_affiliation_string":"Cadence Design Systems, San Jose, USA","institution_ids":["https://openalex.org/I66217453"]},{"raw_affiliation_string":"Cadence Design Systems, San Jose, USA#TAB#","institution_ids":["https://openalex.org/I66217453"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5050365912","display_name":"Luciano Lavagno","orcid":"https://orcid.org/0000-0002-9762-6522"},"institutions":[{"id":"https://openalex.org/I66217453","display_name":"Cadence Design Systems (United States)","ror":"https://ror.org/04w8xa018","country_code":"US","type":"company","lineage":["https://openalex.org/I66217453"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"L Lavagno","raw_affiliation_strings":["Cadence Design Systems, San Jose, USA","Cadence Design Systems, San Jose, USA#TAB#"],"affiliations":[{"raw_affiliation_string":"Cadence Design Systems, San Jose, USA","institution_ids":["https://openalex.org/I66217453"]},{"raw_affiliation_string":"Cadence Design Systems, San Jose, USA#TAB#","institution_ids":["https://openalex.org/I66217453"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043997885","display_name":"Michael Meyer","orcid":"https://orcid.org/0000-0002-1571-4255"},"institutions":[{"id":"https://openalex.org/I66217453","display_name":"Cadence Design Systems (United States)","ror":"https://ror.org/04w8xa018","country_code":"US","type":"company","lineage":["https://openalex.org/I66217453"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"M Meyer","raw_affiliation_strings":["Cadence Design Systems, San Jose, USA","Cadence Design Systems, San Jose, USA#TAB#"],"affiliations":[{"raw_affiliation_string":"Cadence Design Systems, San Jose, USA","institution_ids":["https://openalex.org/I66217453"]},{"raw_affiliation_string":"Cadence Design Systems, San Jose, USA#TAB#","institution_ids":["https://openalex.org/I66217453"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5052990262","display_name":"Y. Watanabe","orcid":"https://orcid.org/0000-0002-6483-4819"},"institutions":[{"id":"https://openalex.org/I66217453","display_name":"Cadence Design Systems (United States)","ror":"https://ror.org/04w8xa018","country_code":"US","type":"company","lineage":["https://openalex.org/I66217453"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Y Watanabe","raw_affiliation_strings":["Cadence Design Systems, San Jose, USA","Cadence Design Systems, San Jose, USA#TAB#"],"affiliations":[{"raw_affiliation_string":"Cadence Design Systems, San Jose, USA","institution_ids":["https://openalex.org/I66217453"]},{"raw_affiliation_string":"Cadence Design Systems, San Jose, USA#TAB#","institution_ids":["https://openalex.org/I66217453"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5069752974"],"corresponding_institution_ids":["https://openalex.org/I66217453"],"apc_list":null,"apc_paid":null,"fwci":3.0813,"has_fulltext":false,"cited_by_count":16,"citation_normalized_percentile":{"value":0.92257411,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.804018497467041},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.7493875026702881},{"id":"https://openalex.org/keywords/software-pipelining","display_name":"Software pipelining","score":0.7451939582824707},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.6522005200386047},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5897149443626404},{"id":"https://openalex.org/keywords/data-flow-analysis","display_name":"Data-flow analysis","score":0.5054402351379395},{"id":"https://openalex.org/keywords/processor-scheduling","display_name":"Processor scheduling","score":0.4661283493041992},{"id":"https://openalex.org/keywords/control-flow-graph","display_name":"Control flow graph","score":0.4397614598274231},{"id":"https://openalex.org/keywords/pareto-optimal","display_name":"Pareto optimal","score":0.42510128021240234},{"id":"https://openalex.org/keywords/graph","display_name":"Graph","score":0.4131910800933838},{"id":"https://openalex.org/keywords/data-flow-diagram","display_name":"Data flow diagram","score":0.3452611565589905},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.3373928666114807},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.27715033292770386},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.23122292757034302},{"id":"https://openalex.org/keywords/multi-objective-optimization","display_name":"Multi-objective optimization","score":0.22986119985580444},{"id":"https://openalex.org/keywords/mathematical-optimization","display_name":"Mathematical optimization","score":0.18659114837646484},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.15821585059165955}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.804018497467041},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.7493875026702881},{"id":"https://openalex.org/C188854837","wikidata":"https://www.wikidata.org/wiki/Q268469","display_name":"Software pipelining","level":3,"score":0.7451939582824707},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.6522005200386047},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5897149443626404},{"id":"https://openalex.org/C88468194","wikidata":"https://www.wikidata.org/wiki/Q1172416","display_name":"Data-flow analysis","level":3,"score":0.5054402351379395},{"id":"https://openalex.org/C2984822820","wikidata":"https://www.wikidata.org/wiki/Q1123036","display_name":"Processor scheduling","level":3,"score":0.4661283493041992},{"id":"https://openalex.org/C27458966","wikidata":"https://www.wikidata.org/wiki/Q1187693","display_name":"Control flow graph","level":2,"score":0.4397614598274231},{"id":"https://openalex.org/C2986314615","wikidata":"https://www.wikidata.org/wiki/Q36829","display_name":"Pareto optimal","level":3,"score":0.42510128021240234},{"id":"https://openalex.org/C132525143","wikidata":"https://www.wikidata.org/wiki/Q141488","display_name":"Graph","level":2,"score":0.4131910800933838},{"id":"https://openalex.org/C489000","wikidata":"https://www.wikidata.org/wiki/Q747385","display_name":"Data flow diagram","level":2,"score":0.3452611565589905},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.3373928666114807},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.27715033292770386},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.23122292757034302},{"id":"https://openalex.org/C68781425","wikidata":"https://www.wikidata.org/wiki/Q2052203","display_name":"Multi-objective optimization","level":2,"score":0.22986119985580444},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.18659114837646484},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.15821585059165955},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.0},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C68387754","wikidata":"https://www.wikidata.org/wiki/Q7271585","display_name":"Schedule","level":2,"score":0.0},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/date.2011.5763223","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2011.5763223","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 Design, Automation &amp; Test in Europe","raw_type":"proceedings-article"},{"id":"pmh:oai:porto.polito.it:2501070","is_oa":true,"landing_page_url":"http://porto.polito.it/2501070/1/pipe_formatted.pdf","pdf_url":null,"source":{"id":"https://openalex.org/S4306402038","display_name":"PORTO Publications Open Repository TOrino (Politecnico di Torino)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I177477856","host_organization_name":"Politecnico di Torino","host_organization_lineage":["https://openalex.org/I177477856"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":{"id":"pmh:oai:porto.polito.it:2501070","is_oa":true,"landing_page_url":"http://porto.polito.it/2501070/1/pipe_formatted.pdf","pdf_url":null,"source":{"id":"https://openalex.org/S4306402038","display_name":"PORTO Publications Open Repository TOrino (Politecnico di Torino)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I177477856","host_organization_name":"Politecnico di Torino","host_organization_lineage":["https://openalex.org/I177477856"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/conferenceObject"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W2054652902","https://openalex.org/W2058810499","https://openalex.org/W2099698078","https://openalex.org/W2100596926","https://openalex.org/W2102041794","https://openalex.org/W2103581911","https://openalex.org/W2118052680","https://openalex.org/W2119903202","https://openalex.org/W2123412205","https://openalex.org/W2125951114","https://openalex.org/W2129956396","https://openalex.org/W2135563788","https://openalex.org/W2137970622","https://openalex.org/W2157758640","https://openalex.org/W2165689945","https://openalex.org/W3211073705","https://openalex.org/W4232919122","https://openalex.org/W4243047356"],"related_works":["https://openalex.org/W2151163382","https://openalex.org/W1999711970","https://openalex.org/W2129956396","https://openalex.org/W2162436812","https://openalex.org/W1968803687","https://openalex.org/W4256382613","https://openalex.org/W1508051931","https://openalex.org/W3168189449","https://openalex.org/W2614194112","https://openalex.org/W2530146034"],"abstract_inverted_index":{"This":[0,20],"paper":[1],"describes":[2],"an":[3,37],"approach":[4,38,64],"to":[5,71],"pipelining":[6],"in":[7,65],"high-level":[8],"synthesis":[9],"that":[10,40],"modifies":[11],"the":[12,22,41,48,60],"control/data":[13],"flow":[14],"graph":[15],"before":[16],"and":[17,29,34,51,74],"after":[18],"scheduling.":[19],"enables":[21],"direct":[23],"re-use":[24],"of":[25,62],"a":[26],"pre-existing,":[27],"timing-":[28],"area-aware":[30],"non-pipelined":[31],"simultaneous":[32],"scheduler":[33],"binder.":[35],"Such":[36],"ensures":[39],"RTL":[42],"output":[43],"can":[44],"be":[45],"synthesized":[46],"within":[47],"given":[49],"timing":[50],"area":[52],"constraints.":[53],"Results":[54],"from":[55],"real":[56],"industrial":[57],"designs":[58],"show":[59],"effectiveness":[61],"this":[63],"improving":[66],"Pareto":[67],"optimality":[68],"with":[69],"respect":[70],"area,":[72],"delay":[73],"power.":[75]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":8}],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}
