{"id":"https://openalex.org/W2162348875","doi":"https://doi.org/10.1109/date.2011.5763221","title":"A delay-insensitive bus-invert code and hardware support for robust asynchronous global communication","display_name":"A delay-insensitive bus-invert code and hardware support for robust asynchronous global communication","publication_year":2011,"publication_date":"2011-03-01","ids":{"openalex":"https://openalex.org/W2162348875","doi":"https://doi.org/10.1109/date.2011.5763221","mag":"2162348875"},"language":"en","primary_location":{"id":"doi:10.1109/date.2011.5763221","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2011.5763221","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 Design, Automation &amp; Test in Europe","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5042729523","display_name":"Melinda Y. Agyekum","orcid":null},"institutions":[{"id":"https://openalex.org/I78577930","display_name":"Columbia University","ror":"https://ror.org/00hj8s172","country_code":"US","type":"education","lineage":["https://openalex.org/I78577930"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"M Y Agyekum","raw_affiliation_strings":["Department of Computer Science, Columbia University, New York, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science, Columbia University, New York, NY, USA","institution_ids":["https://openalex.org/I78577930"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5023548648","display_name":"Steven M. Nowick","orcid":"https://orcid.org/0000-0002-8837-8109"},"institutions":[{"id":"https://openalex.org/I78577930","display_name":"Columbia University","ror":"https://ror.org/00hj8s172","country_code":"US","type":"education","lineage":["https://openalex.org/I78577930"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S M Nowick","raw_affiliation_strings":["Department of Computer Science, Columbia University, New York, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science, Columbia University, New York, NY, USA","institution_ids":["https://openalex.org/I78577930"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I78577930"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7329522371292114},{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.6512781381607056},{"id":"https://openalex.org/keywords/encoder","display_name":"Encoder","score":0.5843870043754578},{"id":"https://openalex.org/keywords/coding","display_name":"Coding (social sciences)","score":0.5198884010314941},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.45817017555236816},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.37835121154785156},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.23989862203598022}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7329522371292114},{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.6512781381607056},{"id":"https://openalex.org/C118505674","wikidata":"https://www.wikidata.org/wiki/Q42586063","display_name":"Encoder","level":2,"score":0.5843870043754578},{"id":"https://openalex.org/C179518139","wikidata":"https://www.wikidata.org/wiki/Q5140297","display_name":"Coding (social sciences)","level":2,"score":0.5198884010314941},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.45817017555236816},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.37835121154785156},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.23989862203598022},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/date.2011.5763221","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2011.5763221","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 Design, Automation &amp; Test in Europe","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.4300000071525574}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":28,"referenced_works":["https://openalex.org/W1483902580","https://openalex.org/W1582500475","https://openalex.org/W1769133684","https://openalex.org/W1858188314","https://openalex.org/W1972827198","https://openalex.org/W1977465455","https://openalex.org/W1981076134","https://openalex.org/W1999082644","https://openalex.org/W2007787415","https://openalex.org/W2027363446","https://openalex.org/W2031011305","https://openalex.org/W2031273683","https://openalex.org/W2037181413","https://openalex.org/W2100451046","https://openalex.org/W2102346142","https://openalex.org/W2118059704","https://openalex.org/W2128723913","https://openalex.org/W2134049183","https://openalex.org/W2139882509","https://openalex.org/W2144489620","https://openalex.org/W2145806390","https://openalex.org/W2154105840","https://openalex.org/W2165072326","https://openalex.org/W3150916971","https://openalex.org/W4234308027","https://openalex.org/W6638190992","https://openalex.org/W6644781339","https://openalex.org/W6681464537"],"related_works":["https://openalex.org/W2116677773","https://openalex.org/W2155261584","https://openalex.org/W2584231425","https://openalex.org/W2150611273","https://openalex.org/W4207086172","https://openalex.org/W2042919702","https://openalex.org/W4225981436","https://openalex.org/W2156185805","https://openalex.org/W2163885456","https://openalex.org/W2363440576"],"abstract_inverted_index":{"A":[0],"new":[1],"class":[2],"of":[3,52,69,120,167],"delay-insensitive":[4],"(DI)":[5],"codes,":[6],"called":[7],"DI":[8,81,129,153,158],"Bus-Invert,":[9],"is":[10,42,46],"introduced":[11],"for":[12,27,59,79],"timing-robust":[13],"global":[14],"asynchronous":[15],"communication.":[16],"This":[17],"work":[18],"builds":[19],"loosely":[20],"on":[21],"an":[22],"earlier":[23],"synchronous":[24],"bus-invert":[25,82,130,159],"approach":[26],"low":[28],"power":[29],"by":[30],"Stan":[31],"and":[32,97,165],"Burleson,":[33],"but":[34,172],"with":[35,173],"significant":[36],"modifications":[37],"to":[38,47,100,109,125,134,148],"ensure":[39],"that":[40],"delay-insensitivity":[41],"guaranteed.":[43],"The":[44],"goal":[45],"minimize":[48],"the":[49,70,80,92,110,128,149,157],"average":[50],"number":[51,166],"wire":[53,137,168],"transitions":[54,138,169],"per":[55,139,170],"communication":[56],"(a":[57],"metric":[58],"dynamic":[60],"power),":[61],"while":[62,141],"maintaining":[63],"good":[64],"coding":[65,144,163],"efficiency.":[66,145],"Basic":[67],"implementations":[68],"key":[71],"supporting":[72],"hardware":[73,176],"blocks":[74],"(encoder,":[75],"completion":[76],"detector,":[77],"decoder)":[78],"codes":[83,131],"are":[84],"also":[85],"presented.":[86],"Each":[87],"design":[88],"was":[89],"synthesized":[90],"using":[91],"UC":[93],"Berkeley":[94],"ABC":[95],"tool":[96],"technology":[98],"mapped":[99],"a":[101,118],"90nm":[102],"industrial":[103],"standard":[104],"cell":[105],"library.":[106],"When":[107],"compared":[108],"most":[111,150],"coding-efficient":[112,151],"systematic":[113],"DIcode":[114],"(i.e.":[115,155],"Berger)":[116],"over":[117],"range":[119],"field":[121],"sizes":[122],"from":[123],"2":[124],"14":[126],"bits,":[127],"had":[132,161],"24.6":[133],"42.9%":[135],"fewer":[136],"transaction,":[140,171],"providing":[142],"comparable":[143],"In":[146],"comparison":[147],"non-systematic":[152],"code":[154,160],"m-of-n),":[156],"similar":[162],"efficiency":[164],"significantly":[174],"lower":[175],"overhead.":[177]},"counts_by_year":[{"year":2015,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
