{"id":"https://openalex.org/W2146787584","doi":"https://doi.org/10.1109/date.2011.5763152","title":"Partitioned cache architectures for reduced NBTI-induced aging","display_name":"Partitioned cache architectures for reduced NBTI-induced aging","publication_year":2011,"publication_date":"2011-03-01","ids":{"openalex":"https://openalex.org/W2146787584","doi":"https://doi.org/10.1109/date.2011.5763152","mag":"2146787584"},"language":"en","primary_location":{"id":"doi:10.1109/date.2011.5763152","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2011.5763152","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 Design, Automation & Test in Europe","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"http://porto.polito.it/2471385/1/MPNBTI.pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5034581393","display_name":"Andrea Calimera","orcid":"https://orcid.org/0000-0001-5881-3811"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"A Calimera","raw_affiliation_strings":["Politecnico di Turino, Torino, Italy","Politecnico di Torino, 10129 Torino, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Politecnico di Turino, Torino, Italy","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Politecnico di Torino, 10129 Torino, Italy","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043364325","display_name":"Mirko Loghi","orcid":"https://orcid.org/0000-0001-7876-3612"},"institutions":[{"id":"https://openalex.org/I129043915","display_name":"University of Udine","ror":"https://ror.org/05ht0mh31","country_code":"IT","type":"education","lineage":["https://openalex.org/I129043915"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"M Loghi","raw_affiliation_strings":["Universit\u00e5 di Udine, Udine, Italy","Universit\u00e2 di Udine, 33100, Udine, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Universit\u00e5 di Udine, Udine, Italy","institution_ids":["https://openalex.org/I129043915"]},{"raw_affiliation_string":"Universit\u00e2 di Udine, 33100, Udine, Italy","institution_ids":["https://openalex.org/I129043915"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5005432629","display_name":"Enrico Macii","orcid":"https://orcid.org/0000-0001-9046-5618"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"E Macii","raw_affiliation_strings":["Politecnico di Turino, Torino, Italy","Politecnico di Torino, 10129 Torino, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Politecnico di Turino, Torino, Italy","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Politecnico di Torino, 10129 Torino, Italy","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5024891882","display_name":"Massimo Poncino","orcid":"https://orcid.org/0000-0002-1369-9688"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"M Poncino","raw_affiliation_strings":["Politecnico di Turino, Torino, Italy","Politecnico di Torino, 10129 Torino, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Politecnico di Turino, Torino, Italy","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Politecnico di Torino, 10129 Torino, Italy","institution_ids":["https://openalex.org/I177477856"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":5.3701,"has_fulltext":false,"cited_by_count":24,"citation_normalized_percentile":{"value":0.96764062,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.7558753490447998},{"id":"https://openalex.org/keywords/negative-bias-temperature-instability","display_name":"Negative-bias temperature instability","score":0.7314813733100891},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6395294070243835},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.6332155466079712},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.6141811609268188},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.45439982414245605},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.43670907616615295},{"id":"https://openalex.org/keywords/leakage","display_name":"Leakage (economics)","score":0.43030235171318054},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.3465685248374939},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3429011106491089},{"id":"https://openalex.org/keywords/threshold-voltage","display_name":"Threshold voltage","score":0.2160888910293579},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.1640479564666748},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.16187581419944763},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.1426694691181183},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.10120770335197449},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.07763952016830444}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.7558753490447998},{"id":"https://openalex.org/C557185","wikidata":"https://www.wikidata.org/wiki/Q6987194","display_name":"Negative-bias temperature instability","level":5,"score":0.7314813733100891},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6395294070243835},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.6332155466079712},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.6141811609268188},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.45439982414245605},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.43670907616615295},{"id":"https://openalex.org/C2777042071","wikidata":"https://www.wikidata.org/wiki/Q6509304","display_name":"Leakage (economics)","level":2,"score":0.43030235171318054},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.3465685248374939},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3429011106491089},{"id":"https://openalex.org/C195370968","wikidata":"https://www.wikidata.org/wiki/Q1754002","display_name":"Threshold voltage","level":4,"score":0.2160888910293579},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.1640479564666748},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.16187581419944763},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.1426694691181183},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.10120770335197449},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.07763952016830444},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/date.2011.5763152","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2011.5763152","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 Design, Automation & Test in Europe","raw_type":"proceedings-article"},{"id":"pmh:oai:porto.polito.it:2471385","is_oa":true,"landing_page_url":"http://porto.polito.it/2471385/1/MPNBTI.pdf","pdf_url":null,"source":{"id":"https://openalex.org/S4306402038","display_name":"PORTO Publications Open Repository TOrino (Politecnico di Torino)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I177477856","host_organization_name":"Politecnico di Torino","host_organization_lineage":["https://openalex.org/I177477856"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":{"id":"pmh:oai:porto.polito.it:2471385","is_oa":true,"landing_page_url":"http://porto.polito.it/2471385/1/MPNBTI.pdf","pdf_url":null,"source":{"id":"https://openalex.org/S4306402038","display_name":"PORTO Publications Open Repository TOrino (Politecnico di Torino)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I177477856","host_organization_name":"Politecnico di Torino","host_organization_lineage":["https://openalex.org/I177477856"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/conferenceObject"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":30,"referenced_works":["https://openalex.org/W1686420892","https://openalex.org/W1968564509","https://openalex.org/W1989662831","https://openalex.org/W1992606304","https://openalex.org/W1998654458","https://openalex.org/W2021282846","https://openalex.org/W2080612374","https://openalex.org/W2088642150","https://openalex.org/W2090283364","https://openalex.org/W2102785080","https://openalex.org/W2103546353","https://openalex.org/W2105561360","https://openalex.org/W2113115586","https://openalex.org/W2120466934","https://openalex.org/W2121778896","https://openalex.org/W2121963261","https://openalex.org/W2122757690","https://openalex.org/W2126357937","https://openalex.org/W2131054871","https://openalex.org/W2164178706","https://openalex.org/W2170464841","https://openalex.org/W3141284234","https://openalex.org/W3144243563","https://openalex.org/W3147784729","https://openalex.org/W4232751114","https://openalex.org/W4235106764","https://openalex.org/W4248310916","https://openalex.org/W4251291498","https://openalex.org/W6684298975","https://openalex.org/W6830300290"],"related_works":["https://openalex.org/W3150866391","https://openalex.org/W2112214579","https://openalex.org/W2310523918","https://openalex.org/W4200470254","https://openalex.org/W2186949690","https://openalex.org/W2167303720","https://openalex.org/W2154109900","https://openalex.org/W2497617944","https://openalex.org/W3019064768","https://openalex.org/W1563139915"],"abstract_inverted_index":{"Conventional":[0],"power":[1,9,158],"management":[2,101],"knobs":[3],"such":[4,134],"as":[5],"voltage":[6],"scaling":[7],"or":[8],"gating":[10],"have":[11,15],"been":[12,84],"shown":[13],"to":[14,43,128,154],"a":[16,30,72,117,135],"beneficial":[17],"effect":[18],"on":[19,67],"the":[20,68,103,107,138,145,169,173],"aging":[21,97,160],"phenomena":[22],"caused":[23],"Negative":[24],"Bias":[25],"Temperature":[26],"Instability":[27],"(NBTI).":[28],"Such":[29],"benefit":[31],"can":[32,111],"be":[33,112],"especially":[34],"exploited":[35],"in":[36,52,123,133,161],"SRAM":[37,174],"memories,":[38],"which":[39,124],"are":[40,126],"particularly":[41],"sensitive":[42],"NBTI":[44],"effects:":[45],"given":[46],"their":[47],"symmetric":[48],"structure,":[49],"they":[50],"cannot":[51],"fact":[53],"take":[54],"advantage":[55],"of":[56,70,77,102,106,116,119,172],"value-dependent":[57],"recovery.":[58],"We":[59],"propose":[60],"an":[61],"architectural":[62],"solutions":[63],"that":[64,137,150],"is":[65,140,152],"based":[66],"idea":[69],"partitioning":[71],"memory":[73],"into":[74],"multiple":[75],"banks":[76,130],"identical":[78],"size.":[79],"While":[80],"this":[81],"organization":[82],"has":[83],"widely":[85],"used":[86],"for":[87,96],"reducing":[88,156],"both":[89],"dynamic":[90],"and":[91,159,166],"static":[92],"power,":[93],"its":[94],"exploitation":[95],"benefits":[98],"requires":[99],"proper":[100],"existing":[104],"idleness":[105,139],"various":[108],"banks.":[109,146],"This":[110],"achieved":[113],"by":[114],"means":[115],"sort":[118],"time-varying":[120],"addressing":[121],"scheme":[122],"addresses":[125],"mapped":[127],"different":[129],"over":[131,143],"time":[132],"way":[136],"uniformly":[141],"distributed":[142],"all":[144],"Experimental":[147],"analysis":[148],"shows":[149],"it":[151],"possible":[153],"simultaneously":[155],"leakage":[157],"caches,":[162],"with":[163],"minimal":[164],"overhead":[165],"without":[167],"modifying":[168],"internal":[170],"structure":[171],"arrays.":[175]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":3},{"year":2013,"cited_by_count":5},{"year":2012,"cited_by_count":6}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}