{"id":"https://openalex.org/W2053105481","doi":"https://doi.org/10.1109/date.2011.5763074","title":"An FPGA bridge preserving traffic quality of service for on-chip network-based systems","display_name":"An FPGA bridge preserving traffic quality of service for on-chip network-based systems","publication_year":2011,"publication_date":"2011-03-01","ids":{"openalex":"https://openalex.org/W2053105481","doi":"https://doi.org/10.1109/date.2011.5763074","mag":"2053105481"},"language":"en","primary_location":{"id":"doi:10.1109/date.2011.5763074","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2011.5763074","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 Design, Automation &amp; Test in Europe","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5004243283","display_name":"AB Nejad","orcid":null},"institutions":[{"id":"https://openalex.org/I98358874","display_name":"Delft University of Technology","ror":"https://ror.org/02e2c7k09","country_code":"NL","type":"education","lineage":["https://openalex.org/I98358874"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"A B Nejad","raw_affiliation_strings":["Delft University of Technnology, Netherlands","Delft University of Technology, The Netherlands;"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Delft University of Technnology, Netherlands","institution_ids":["https://openalex.org/I98358874"]},{"raw_affiliation_string":"Delft University of Technology, The Netherlands;","institution_ids":["https://openalex.org/I98358874"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5108516663","display_name":"M.E. Mart\u0131\u0301nez","orcid":null},"institutions":[{"id":"https://openalex.org/I98358874","display_name":"Delft University of Technology","ror":"https://ror.org/02e2c7k09","country_code":"NL","type":"education","lineage":["https://openalex.org/I98358874"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"M E Martinez","raw_affiliation_strings":["Delft University of Technnology, Netherlands","Delft University of Technology, The Netherlands;"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Delft University of Technnology, Netherlands","institution_ids":["https://openalex.org/I98358874"]},{"raw_affiliation_string":"Delft University of Technology, The Netherlands;","institution_ids":["https://openalex.org/I98358874"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5048502768","display_name":"Kees Goossens","orcid":"https://orcid.org/0000-0001-7536-4050"},"institutions":[{"id":"https://openalex.org/I83019370","display_name":"Eindhoven University of Technology","ror":"https://ror.org/02c2kyt77","country_code":"NL","type":"education","lineage":["https://openalex.org/I83019370"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"K Goossens","raw_affiliation_strings":["Eindhovan University of Technology, Netherlands","Eindhoven University of Technology/The Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Eindhovan University of Technology, Netherlands","institution_ids":["https://openalex.org/I83019370"]},{"raw_affiliation_string":"Eindhoven University of Technology/The Netherlands","institution_ids":["https://openalex.org/I83019370"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":12,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7607813477516174},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.716144323348999},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.7090576887130737},{"id":"https://openalex.org/keywords/quality-of-service","display_name":"Quality of service","score":0.6123705506324768},{"id":"https://openalex.org/keywords/network-on-a-chip","display_name":"Network on a chip","score":0.5453743934631348},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.5320143699645996},{"id":"https://openalex.org/keywords/fpga-prototype","display_name":"FPGA prototype","score":0.5120256543159485},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.5076731443405151},{"id":"https://openalex.org/keywords/debugging","display_name":"Debugging","score":0.4942028820514679},{"id":"https://openalex.org/keywords/partition","display_name":"Partition (number theory)","score":0.4870339035987854},{"id":"https://openalex.org/keywords/bridging","display_name":"Bridging (networking)","score":0.46849995851516724},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.37857192754745483},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.3204370141029358},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.12039607763290405},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.07517105340957642}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7607813477516174},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.716144323348999},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.7090576887130737},{"id":"https://openalex.org/C5119721","wikidata":"https://www.wikidata.org/wiki/Q220501","display_name":"Quality of service","level":2,"score":0.6123705506324768},{"id":"https://openalex.org/C128519102","wikidata":"https://www.wikidata.org/wiki/Q339554","display_name":"Network on a chip","level":2,"score":0.5453743934631348},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.5320143699645996},{"id":"https://openalex.org/C203864433","wikidata":"https://www.wikidata.org/wiki/Q5426992","display_name":"FPGA prototype","level":3,"score":0.5120256543159485},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.5076731443405151},{"id":"https://openalex.org/C168065819","wikidata":"https://www.wikidata.org/wiki/Q845566","display_name":"Debugging","level":2,"score":0.4942028820514679},{"id":"https://openalex.org/C42812","wikidata":"https://www.wikidata.org/wiki/Q1082910","display_name":"Partition (number theory)","level":2,"score":0.4870339035987854},{"id":"https://openalex.org/C174348530","wikidata":"https://www.wikidata.org/wiki/Q188635","display_name":"Bridging (networking)","level":2,"score":0.46849995851516724},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.37857192754745483},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.3204370141029358},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.12039607763290405},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.07517105340957642},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":6,"locations":[{"id":"doi:10.1109/date.2011.5763074","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2011.5763074","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 Design, Automation &amp; Test in Europe","raw_type":"proceedings-article"},{"id":"pmh:oai:pure.tue.nl:openaire_cris_publications/4a2b8af0-43a1-4fa7-9217-7460288e00ae","is_oa":false,"landing_page_url":"https://research.tue.nl/en/publications/4a2b8af0-43a1-4fa7-9217-7460288e00ae","pdf_url":null,"source":{"id":"https://openalex.org/S4406922641","display_name":"TU/e Research Portal","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Nejad, A B, Martinez, M E & Goossens, K 2011, An FPGA bridge preserving traffic quality of service for on-chip network-based systems. in Proceedings - Design, Automation and Test in Europe Conference and Exhibition, DATE 2011., 5763074, Institute of Electrical and Electronics Engineers, Piscataway, pp. 425-430, 14th Design, Automation and Test in Europe Conference and Exhibition (DATE 2011) , Grenoble, France, 14/03/11. https://doi.org/10.1109/DATE.2011.5763074","raw_type":"info:eu-repo/semantics/conferenceObject"},{"id":"pmh:917377","is_oa":false,"landing_page_url":"http://library.tue.nl/csp/dare/LinkToRepository.csp?recordnumber=917377","pdf_url":null,"source":{"id":"https://openalex.org/S4406923046","display_name":"TU/e Research Portal (Eindhoven University of Technology)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":null},{"id":"pmh:oai:library.tue.nl:917377","is_oa":false,"landing_page_url":"http://repository.tue.nl/917377","pdf_url":null,"source":{"id":"https://openalex.org/S4406923046","display_name":"TU/e Research Portal (Eindhoven University of Technology)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":null},{"id":"pmh:oai:pure.tue.nl:publications/4a2b8af0-43a1-4fa7-9217-7460288e00ae","is_oa":false,"landing_page_url":"http://www.scopus.com/inward/record.url?scp=79957573681&partnerID=8YFLogxK","pdf_url":null,"source":{"id":"https://openalex.org/S4406922641","display_name":"TU/e Research Portal","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Nejad, A B, Martinez, M E & Goossens, K 2011, An FPGA bridge preserving traffic quality of service for on-chip network-based systems. in Proceedings - Design, Automation and Test in Europe Conference and Exhibition, DATE 2011., 5763074, Institute of Electrical and Electronics Engineers, Piscataway, pp. 425-430, 14th Design, Automation and Test in Europe Conference and Exhibition (DATE 2011) , Grenoble, France, 14/03/11. https://doi.org/10.1109/DATE.2011.5763074","raw_type":"info:eu-repo/semantics/conferenceObject"},{"id":"pmh:tue:oai:pure.tue.nl:publications/4a2b8af0-43a1-4fa7-9217-7460288e00ae","is_oa":false,"landing_page_url":"https://research.tue.nl/nl/publications/4a2b8af0-43a1-4fa7-9217-7460288e00ae","pdf_url":null,"source":{"id":"https://openalex.org/S4306401843","display_name":"Data Archiving and Networked Services (DANS)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1322597698","host_organization_name":"Royal Netherlands Academy of Arts and Sciences","host_organization_lineage":["https://openalex.org/I1322597698"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Proceedings - Design, Automation and Test in Europe Conference and Exhibition, DATE 2011, 425 - 430","raw_type":"info:eu-repo/semantics/conferencepaper"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W944738001","https://openalex.org/W1528722716","https://openalex.org/W1964447474","https://openalex.org/W1973113362","https://openalex.org/W1978507093","https://openalex.org/W2012959791","https://openalex.org/W2021200789","https://openalex.org/W2104610013","https://openalex.org/W2108727674","https://openalex.org/W2113116043","https://openalex.org/W2120820413","https://openalex.org/W2123184444","https://openalex.org/W2132181288","https://openalex.org/W2148439886","https://openalex.org/W2156360978","https://openalex.org/W2168072991","https://openalex.org/W2544550464"],"related_works":["https://openalex.org/W2135981148","https://openalex.org/W2388672758","https://openalex.org/W2065289416","https://openalex.org/W2754086592","https://openalex.org/W2144357574","https://openalex.org/W4230458348","https://openalex.org/W3198758847","https://openalex.org/W2519428907","https://openalex.org/W1966325333","https://openalex.org/W2108200233"],"abstract_inverted_index":{"FPGA":[0,63],"prototyping":[1],"of":[2,17,56,89,102,130],"recent":[3],"large":[4],"Systems":[5],"on":[6,60],"Chip":[7],"(SoCs)":[8],"is":[9,32,58,118],"very":[10],"challenging":[11],"due":[12],"to":[13,25,39],"the":[14,72,79,83,86,103,108,113],"resource":[15],"limitation":[16],"a":[18,41,61,116],"single":[19],"FPGA.":[20],"Moreover,":[21],"having":[22],"external":[23],"access":[24],"SoCs":[26],"for":[27,112],"verification":[28],"and":[29,54,132],"debug":[30],"purposes":[31],"essential.":[33],"In":[34,92],"this":[35,93],"paper,":[36,94],"we":[37,95],"suggest":[38],"partition":[40],"network-on-chip":[42],"(NoC)":[43],"based":[44],"system":[45],"into":[46],"smaller":[47],"sub-systems":[48,80],"each":[49,55],"with":[50],"their":[51],"own":[52],"NoC,":[53],"which":[57],"implemented":[59],"separate":[62],"board.":[64],"Multiple":[65],"SoC":[66],"ASICs":[67],"can":[68],"be":[69],"bridged":[70],"in":[71,128],"same":[73],"way.":[74],"The":[75,120],"scheme":[76],"that":[77,124],"interconnects":[78],"should":[81],"offer":[82],"application":[84],"connections":[85],"required":[87],"quality":[88],"service":[90],"(QoS).":[91],"investigate":[96],"bridging":[97],"schemes":[98],"at":[99],"different":[100],"levels":[101],"NoC":[104],"protocol":[105],"stack.":[106],"Comparing":[107],"distinct":[109],"design":[110],"criteria":[111],"proposed":[114],"schemes,":[115],"bridge":[117,121],"designed.":[119],"experiments":[122],"show":[123],"it":[125],"provides":[126],"QoS":[127],"terms":[129],"bandwith":[131],"latency.":[133]},"counts_by_year":[{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":1},{"year":2015,"cited_by_count":3},{"year":2014,"cited_by_count":4}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
