{"id":"https://openalex.org/W2096494420","doi":"https://doi.org/10.1109/date.2011.5763062","title":"Speeding Up MPSoC virtual platform simulation by Ultra Synchronization Checking Method","display_name":"Speeding Up MPSoC virtual platform simulation by Ultra Synchronization Checking Method","publication_year":2011,"publication_date":"2011-03-01","ids":{"openalex":"https://openalex.org/W2096494420","doi":"https://doi.org/10.1109/date.2011.5763062","mag":"2096494420"},"language":"en","primary_location":{"id":"doi:10.1109/date.2011.5763062","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2011.5763062","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 Design, Automation & Test in Europe","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5063626622","display_name":"Yu-Fu Yeh","orcid":null},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Yu-Fu Yeh","raw_affiliation_strings":["Graduate Institute of Electronics Engineering, National Taiwan University, Taiwan","Graduate Institute of Electronics Engineering, National Taiwan University,#TAB#"],"affiliations":[{"raw_affiliation_string":"Graduate Institute of Electronics Engineering, National Taiwan University, Taiwan","institution_ids":["https://openalex.org/I16733864"]},{"raw_affiliation_string":"Graduate Institute of Electronics Engineering, National Taiwan University,#TAB#","institution_ids":["https://openalex.org/I16733864"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5069922390","display_name":"Chung-Yang Huang","orcid":"https://orcid.org/0009-0000-8712-6957"},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chung-Yang Huang","raw_affiliation_strings":["Graduate Institute of Electronics Engineering, National Taiwan University, Taiwan"],"affiliations":[{"raw_affiliation_string":"Graduate Institute of Electronics Engineering, National Taiwan University, Taiwan","institution_ids":["https://openalex.org/I16733864"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5036280172","display_name":"Chi-An Wu","orcid":"https://orcid.org/0000-0001-9046-8392"},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chi-An Wu","raw_affiliation_strings":["Graduate Institute of Electronics Engineering, National Taiwan University, Taiwan","Graduate Institute of Electronics Engineering, National Taiwan University,#TAB#"],"affiliations":[{"raw_affiliation_string":"Graduate Institute of Electronics Engineering, National Taiwan University, Taiwan","institution_ids":["https://openalex.org/I16733864"]},{"raw_affiliation_string":"Graduate Institute of Electronics Engineering, National Taiwan University,#TAB#","institution_ids":["https://openalex.org/I16733864"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5017169772","display_name":"Hsin-Cheng Lin","orcid":"https://orcid.org/0000-0002-2110-4867"},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Hsin-Cheng Lin","raw_affiliation_strings":["Department of Electrical Engineering, National Taiwan University, Taiwan","Department of Electrical Engineering, National Taiwan University"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Taiwan University, Taiwan","institution_ids":["https://openalex.org/I16733864"]},{"raw_affiliation_string":"Department of Electrical Engineering, National Taiwan University","institution_ids":["https://openalex.org/I16733864"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5063626622"],"corresponding_institution_ids":["https://openalex.org/I16733864"],"apc_list":null,"apc_paid":null,"fwci":0.2519,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.568197,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11195","display_name":"Simulation Techniques and Applications","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1803","display_name":"Management Science and Operations Research"},"field":{"id":"https://openalex.org/fields/18","display_name":"Decision Sciences"},"domain":{"id":"https://openalex.org/domains/2","display_name":"Social Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/mpsoc","display_name":"MPSoC","score":0.8549575805664062},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8133305311203003},{"id":"https://openalex.org/keywords/synchronization","display_name":"Synchronization (alternating current)","score":0.574495255947113},{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.5660248398780823},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5614317655563354},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.5532717108726501},{"id":"https://openalex.org/keywords/design-space-exploration","display_name":"Design space exploration","score":0.5186228156089783},{"id":"https://openalex.org/keywords/discrete-event-simulation","display_name":"Discrete event simulation","score":0.46460622549057007},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.4444602131843567},{"id":"https://openalex.org/keywords/embedded-software","display_name":"Embedded software","score":0.43628424406051636},{"id":"https://openalex.org/keywords/simulation-software","display_name":"Simulation software","score":0.43358349800109863},{"id":"https://openalex.org/keywords/virtual-machine","display_name":"Virtual machine","score":0.4131448268890381},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.41168081760406494},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3224928379058838},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.2514214515686035},{"id":"https://openalex.org/keywords/simulation","display_name":"Simulation","score":0.25056159496307373},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.14225685596466064}],"concepts":[{"id":"https://openalex.org/C2777187653","wikidata":"https://www.wikidata.org/wiki/Q975106","display_name":"MPSoC","level":3,"score":0.8549575805664062},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8133305311203003},{"id":"https://openalex.org/C2778562939","wikidata":"https://www.wikidata.org/wiki/Q1298791","display_name":"Synchronization (alternating current)","level":3,"score":0.574495255947113},{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.5660248398780823},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5614317655563354},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.5532717108726501},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.5186228156089783},{"id":"https://openalex.org/C147203929","wikidata":"https://www.wikidata.org/wiki/Q574814","display_name":"Discrete event simulation","level":2,"score":0.46460622549057007},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.4444602131843567},{"id":"https://openalex.org/C154488198","wikidata":"https://www.wikidata.org/wiki/Q1335007","display_name":"Embedded software","level":3,"score":0.43628424406051636},{"id":"https://openalex.org/C91757755","wikidata":"https://www.wikidata.org/wiki/Q11121294","display_name":"Simulation software","level":3,"score":0.43358349800109863},{"id":"https://openalex.org/C25344961","wikidata":"https://www.wikidata.org/wiki/Q192726","display_name":"Virtual machine","level":2,"score":0.4131448268890381},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.41168081760406494},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3224928379058838},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.2514214515686035},{"id":"https://openalex.org/C44154836","wikidata":"https://www.wikidata.org/wiki/Q45045","display_name":"Simulation","level":1,"score":0.25056159496307373},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.14225685596466064},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/date.2011.5763062","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2011.5763062","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 Design, Automation & Test in Europe","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W2074719219","https://openalex.org/W2102039064","https://openalex.org/W2103581911","https://openalex.org/W2113952960","https://openalex.org/W2142899035","https://openalex.org/W2144115460","https://openalex.org/W2151174323","https://openalex.org/W2154881390","https://openalex.org/W3148239352","https://openalex.org/W4238435901","https://openalex.org/W6669079894","https://openalex.org/W6681505947","https://openalex.org/W6683140089"],"related_works":["https://openalex.org/W2092181573","https://openalex.org/W2576551918","https://openalex.org/W2056447856","https://openalex.org/W2998838928","https://openalex.org/W2783693002","https://openalex.org/W3043614744","https://openalex.org/W2105957719","https://openalex.org/W1484603919","https://openalex.org/W1973069902","https://openalex.org/W4294611724"],"abstract_inverted_index":{"Virtual":[0],"platform":[1,54,80,129,171],"simulation":[2,29,55,61,113,121,130],"is":[3,160],"an":[4,69],"essential":[5],"technique":[6],"for":[7,75],"early-stage":[8],"system-level":[9],"design":[10,145],"space":[11],"exploration":[12],"and":[13,24,31,77,99,105,115],"embedded":[14,27],"software":[15,100],"development.":[16],"In":[17,64],"order":[18],"to":[19,163],"explore":[20],"the":[21,26,34,41,45,51,60,91,96,109,117,127,137,147,164,169],"hardware":[22,97],"behavior":[23],"verify":[25],"software,":[28],"speed":[30,62,148],"accuracy":[32],"are":[33],"two":[35],"most":[36],"critical":[37],"factors.":[38],"However,":[39],"given":[40],"increasing":[42],"complexity":[43],"of":[44,149,166],"Multi-Processor":[46],"System-on-Chip":[47],"(MPSoC)":[48],"designs,":[49],"even":[50],"state-of-the-art":[52],"virtual":[53,79,128,170],"algorithms":[56],"may":[57],"suffer":[58],"from":[59],"issue.":[63],"this":[65],"paper,":[66],"we":[67,123],"proposed":[68,138],"Ultra":[70],"Synchronization":[71],"Checking":[72],"Method":[73],"(USCM)":[74],"fast":[76],"robust":[78],"simulation.":[81,172],"We":[82,154],"devise":[83],"a":[84,142],"data":[85],"dependency":[86],"table":[87],"(DDT)":[88],"so":[89],"that":[90,136,157],"memory":[92],"access":[93],"information":[94],"by":[95],"modules":[98,114],"programs":[101],"can":[102,124,140],"be":[103],"predicted":[104],"checked.":[106],"By":[107],"reducing":[108],"unnecessary":[110],"synchronizations":[111],"among":[112],"utilizing":[116],"asynchronous":[118],"discrete":[119],"event":[120],"technique,":[122],"significantly":[125],"improve":[126],"speed.":[131],"Our":[132],"experimental":[133],"results":[134],"show":[135],"USCM":[139],"simulate":[141],"32-processor":[143],"SoC":[144],"in":[146,168],"multimillion":[150],"instructions":[151],"per":[152],"second.":[153],"also":[155],"demonstrate":[156],"our":[158],"method":[159],"less":[161],"sensitive":[162],"number":[165],"cores":[167]},"counts_by_year":[{"year":2013,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}