{"id":"https://openalex.org/W2101898892","doi":"https://doi.org/10.1109/date.2011.5763041","title":"Design-for-test methodology for non-scan at-speed testing","display_name":"Design-for-test methodology for non-scan at-speed testing","publication_year":2011,"publication_date":"2011-03-01","ids":{"openalex":"https://openalex.org/W2101898892","doi":"https://doi.org/10.1109/date.2011.5763041","mag":"2101898892"},"language":"en","primary_location":{"id":"doi:10.1109/date.2011.5763041","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2011.5763041","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 Design, Automation & Test in Europe","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5046749845","display_name":"Mainak Banga","orcid":null},"institutions":[{"id":"https://openalex.org/I859038795","display_name":"Virginia Tech","ror":"https://ror.org/02smfhw86","country_code":"US","type":"education","lineage":["https://openalex.org/I859038795"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mainak Banga","raw_affiliation_strings":["Bradley Department of ECE, Virginia Polytechnic Institute and State University, Blacksburg, VA, USA","Bradley Department of ECE, Virginia Tech, Blacksburg, Virginia - 24061"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Bradley Department of ECE, Virginia Polytechnic Institute and State University, Blacksburg, VA, USA","institution_ids":["https://openalex.org/I859038795"]},{"raw_affiliation_string":"Bradley Department of ECE, Virginia Tech, Blacksburg, Virginia - 24061","institution_ids":["https://openalex.org/I859038795"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5059024810","display_name":"Nikhil Rahagude","orcid":null},"institutions":[{"id":"https://openalex.org/I859038795","display_name":"Virginia Tech","ror":"https://ror.org/02smfhw86","country_code":"US","type":"education","lineage":["https://openalex.org/I859038795"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Nikhil Rahagude","raw_affiliation_strings":["Bradley Department of ECE, Virginia Polytechnic Institute and State University, Blacksburg, VA, USA","Bradley Department of ECE, Virginia Tech, Blacksburg, Virginia - 24061"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Bradley Department of ECE, Virginia Polytechnic Institute and State University, Blacksburg, VA, USA","institution_ids":["https://openalex.org/I859038795"]},{"raw_affiliation_string":"Bradley Department of ECE, Virginia Tech, Blacksburg, Virginia - 24061","institution_ids":["https://openalex.org/I859038795"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5108516165","display_name":"Michael S. Hsiao","orcid":null},"institutions":[{"id":"https://openalex.org/I859038795","display_name":"Virginia Tech","ror":"https://ror.org/02smfhw86","country_code":"US","type":"education","lineage":["https://openalex.org/I859038795"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Michael S. Hsiao","raw_affiliation_strings":["Bradley Department of ECE, Virginia Polytechnic Institute and State University, Blacksburg, VA, USA","Bradley Department of ECE, Virginia Tech, Blacksburg, Virginia - 24061"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Bradley Department of ECE, Virginia Polytechnic Institute and State University, Blacksburg, VA, USA","institution_ids":["https://openalex.org/I859038795"]},{"raw_affiliation_string":"Bradley Department of ECE, Virginia Tech, Blacksburg, Virginia - 24061","institution_ids":["https://openalex.org/I859038795"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I859038795"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9948999881744385,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/fault-coverage","display_name":"Fault coverage","score":0.7865036725997925},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7633320093154907},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.6684824228286743},{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.6588956117630005},{"id":"https://openalex.org/keywords/scan-chain","display_name":"Scan chain","score":0.6312451958656311},{"id":"https://openalex.org/keywords/test-compression","display_name":"Test compression","score":0.5901217460632324},{"id":"https://openalex.org/keywords/reset","display_name":"Reset (finance)","score":0.5622572302818298},{"id":"https://openalex.org/keywords/code-coverage","display_name":"Code coverage","score":0.5163580179214478},{"id":"https://openalex.org/keywords/design-for-testing","display_name":"Design for testing","score":0.49999356269836426},{"id":"https://openalex.org/keywords/sequential-logic","display_name":"Sequential logic","score":0.47722771763801575},{"id":"https://openalex.org/keywords/fault","display_name":"Fault (geology)","score":0.43427199125289917},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3938407301902771},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.32825392484664917},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.312192440032959},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.286954402923584},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.27751582860946655},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.24792024493217468},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.2163887321949005},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.09146279096603394}],"concepts":[{"id":"https://openalex.org/C126953365","wikidata":"https://www.wikidata.org/wiki/Q5438152","display_name":"Fault coverage","level":3,"score":0.7865036725997925},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7633320093154907},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.6684824228286743},{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.6588956117630005},{"id":"https://openalex.org/C150012182","wikidata":"https://www.wikidata.org/wiki/Q225990","display_name":"Scan chain","level":3,"score":0.6312451958656311},{"id":"https://openalex.org/C29652920","wikidata":"https://www.wikidata.org/wiki/Q7705757","display_name":"Test compression","level":4,"score":0.5901217460632324},{"id":"https://openalex.org/C2779795794","wikidata":"https://www.wikidata.org/wiki/Q7315343","display_name":"Reset (finance)","level":2,"score":0.5622572302818298},{"id":"https://openalex.org/C53942775","wikidata":"https://www.wikidata.org/wiki/Q1211721","display_name":"Code coverage","level":3,"score":0.5163580179214478},{"id":"https://openalex.org/C190874656","wikidata":"https://www.wikidata.org/wiki/Q5264347","display_name":"Design for testing","level":3,"score":0.49999356269836426},{"id":"https://openalex.org/C187075797","wikidata":"https://www.wikidata.org/wiki/Q173245","display_name":"Sequential logic","level":3,"score":0.47722771763801575},{"id":"https://openalex.org/C175551986","wikidata":"https://www.wikidata.org/wiki/Q47089","display_name":"Fault (geology)","level":2,"score":0.43427199125289917},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3938407301902771},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.32825392484664917},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.312192440032959},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.286954402923584},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.27751582860946655},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.24792024493217468},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.2163887321949005},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.09146279096603394},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C51234621","wikidata":"https://www.wikidata.org/wiki/Q2149495","display_name":"Testability","level":2,"score":0.0},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C165205528","wikidata":"https://www.wikidata.org/wiki/Q83371","display_name":"Seismology","level":1,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C106159729","wikidata":"https://www.wikidata.org/wiki/Q2294553","display_name":"Financial economics","level":1,"score":0.0},{"id":"https://openalex.org/C127313418","wikidata":"https://www.wikidata.org/wiki/Q1069","display_name":"Geology","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/date.2011.5763041","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2011.5763041","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 Design, Automation & Test in Europe","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1763985980","https://openalex.org/W1966348745","https://openalex.org/W1972289445","https://openalex.org/W1985440524","https://openalex.org/W1999775506","https://openalex.org/W2099161646","https://openalex.org/W2102559735","https://openalex.org/W2116424179","https://openalex.org/W2117905839","https://openalex.org/W2128144345","https://openalex.org/W2135931142","https://openalex.org/W2138284668","https://openalex.org/W2143744297","https://openalex.org/W2147563705","https://openalex.org/W2168755502"],"related_works":["https://openalex.org/W1581610324","https://openalex.org/W2131499522","https://openalex.org/W2129124567","https://openalex.org/W3088373974","https://openalex.org/W2167571917","https://openalex.org/W2189059878","https://openalex.org/W2146547687","https://openalex.org/W2620614665","https://openalex.org/W2110102663","https://openalex.org/W2049913894"],"abstract_inverted_index":{"While":[0],"scan-based":[1,178],"testing":[2,62],"achieves":[3],"a":[4,50,64,108],"high":[5,27,196],"fault":[6,94,198],"coverage,":[7],"it":[8],"requires":[9],"long":[10],"test":[11,28,170,204],"application":[12,171,205],"times":[13],"and":[14,26,185],"substantial":[15],"tester":[16],"memory,":[17],"in":[18,23,141],"addition":[19],"to":[20,63,92,128,193,210],"the":[21,33,58,68,73,77,115,121,133,142,203],"overhead":[22,176],"chip":[24],"area":[25,175],"power.":[29],"Functional":[30],"testing,":[31],"on":[32,182],"other":[34],"hand,":[35],"suffers":[36],"from":[37],"low":[38],"coverage":[39],"but":[40],"can":[41,156],"be":[42,157],"applied":[43,158],"at-speed.":[44],"In":[45,67,132],"this":[46],"paper,":[47],"we":[48,71,136,190],"propose":[49],"novel":[51],"three-step":[52],"design-for-test":[53],"(DFT)":[54],"methodology":[55],"which":[56],"enhances":[57],"performance":[59],"of":[60,76,107,119,169],"functional":[61],"great":[65],"extent.":[66],"first":[69],"step":[70,117],"expand":[72],"state":[74,112],"space":[75,82,113],"circuit":[78,109,143],"beyond":[79],"functionally":[80],"reachable":[81],"without":[83],"scan":[84,162,211],"or":[85],"reset.":[86],"These":[87],"new":[88],"states":[89],"create":[90],"conditions":[91],"activate/propagate":[93],"effects":[95],"that":[96,126,189],"are":[97,191],"otherwise":[98],"hard-to-detect.":[99],"Since":[100],"structural":[101],"correlation":[102],"between":[103],"D":[104],"flip-flops":[105],"(DFFs)":[106],"restricts":[110],"its":[111],"variation,":[114],"second":[116],"consists":[118],"partitioning":[120],"DFFs":[122],"into":[123],"different":[124],"groups":[125],"helps":[127],"break":[129],"such":[130],"correlations.":[131],"third":[134],"step,":[135],"make":[137],"internal":[138],"hard-to-observe":[139],"points":[140],"more":[144],"observable":[145],"by":[146],"directly":[147],"XORing":[148],"them":[149],"with":[150,173],"selected":[151],"primary":[152],"outputs.":[153],"This":[154],"method":[155],"at-speed":[159],"(since":[160],"no":[161],"shifting":[163],"is":[164],"involved)":[165],"saving":[166],"significant":[167],"amount":[168],"time,":[172],"comparable":[174],"as":[177,208],"DFT.":[179],"Our":[180],"experiments":[181],"large":[183],"ISCAS'89":[184],"ITC'99":[186],"benchmarks":[187],"show":[188],"able":[192],"achieve":[194],"very":[195],"non-scan":[197],"coverages":[199],"while":[200],"simultaneously":[201],"reducing":[202],"time":[206],"(114\u00d7)":[207],"compared":[209],"based":[212],"techniques.":[213]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}