{"id":"https://openalex.org/W3144371145","doi":"https://doi.org/10.1109/date.2010.5456952","title":"Worst case delay analysis for memory interference in multicore systems","display_name":"Worst case delay analysis for memory interference in multicore systems","publication_year":2010,"publication_date":"2010-03-01","ids":{"openalex":"https://openalex.org/W3144371145","doi":"https://doi.org/10.1109/date.2010.5456952","mag":"3144371145"},"language":"en","primary_location":{"id":"doi:10.1109/date.2010.5456952","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2010.5456952","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 Design, Automation &amp; Test in Europe Conference &amp; Exhibition (DATE 2010)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5009578055","display_name":"Rodolfo Pellizzoni","orcid":"https://orcid.org/0000-0002-7331-804X"},"institutions":[{"id":"https://openalex.org/I157725225","display_name":"University of Illinois Urbana-Champaign","ror":"https://ror.org/047426m28","country_code":"US","type":"education","lineage":["https://openalex.org/I157725225"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Rodolfo Pellizzoni","raw_affiliation_strings":["University of Illinois, Urbana-Champaign, Urbana, IL, USA"],"affiliations":[{"raw_affiliation_string":"University of Illinois, Urbana-Champaign, Urbana, IL, USA","institution_ids":["https://openalex.org/I157725225"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5018470154","display_name":"Andreas Schranzhofer","orcid":null},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Andreas Schranzhofer","raw_affiliation_strings":["Swiss Federal Institute of Technology, Zurich, Switzerland"],"affiliations":[{"raw_affiliation_string":"Swiss Federal Institute of Technology, Zurich, Switzerland","institution_ids":["https://openalex.org/I5124864"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5000417436","display_name":"Jian-Jia Chen","orcid":"https://orcid.org/0000-0001-8114-9760"},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Jian-Jia Chen","raw_affiliation_strings":["Swiss Federal Institute of Technology, Zurich, Switzerland"],"affiliations":[{"raw_affiliation_string":"Swiss Federal Institute of Technology, Zurich, Switzerland","institution_ids":["https://openalex.org/I5124864"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5060442004","display_name":"Marco Caccamo","orcid":"https://orcid.org/0000-0003-2328-044X"},"institutions":[{"id":"https://openalex.org/I157725225","display_name":"University of Illinois Urbana-Champaign","ror":"https://ror.org/047426m28","country_code":"US","type":"education","lineage":["https://openalex.org/I157725225"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Marco Caccamo","raw_affiliation_strings":["University of Illinois, Urbana-Champaign, Urbana, IL, USA"],"affiliations":[{"raw_affiliation_string":"University of Illinois, Urbana-Champaign, Urbana, IL, USA","institution_ids":["https://openalex.org/I157725225"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5060999697","display_name":"Lothar Thiele","orcid":"https://orcid.org/0000-0001-6139-868X"},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Lothar Thiele","raw_affiliation_strings":["Swiss Federal Institute of Technology, Zurich, Switzerland"],"affiliations":[{"raw_affiliation_string":"Swiss Federal Institute of Technology, Zurich, Switzerland","institution_ids":["https://openalex.org/I5124864"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5009578055"],"corresponding_institution_ids":["https://openalex.org/I157725225"],"apc_list":null,"apc_paid":null,"fwci":5.4931,"has_fulltext":false,"cited_by_count":115,"citation_normalized_percentile":{"value":0.96444059,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":91,"max":99},"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10772","display_name":"Distributed systems and fault tolerance","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8642973899841309},{"id":"https://openalex.org/keywords/task","display_name":"Task (project management)","score":0.7038393616676331},{"id":"https://openalex.org/keywords/worst-case-execution-time","display_name":"Worst-case execution time","score":0.6546118855476379},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.6244804859161377},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.5748118162155151},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5206498503684998},{"id":"https://openalex.org/keywords/interference","display_name":"Interference (communication)","score":0.4879447817802429},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.47533440589904785},{"id":"https://openalex.org/keywords/static-timing-analysis","display_name":"Static timing analysis","score":0.4706648588180542},{"id":"https://openalex.org/keywords/representation","display_name":"Representation (politics)","score":0.4518621861934662},{"id":"https://openalex.org/keywords/upper-and-lower-bounds","display_name":"Upper and lower bounds","score":0.412602037191391},{"id":"https://openalex.org/keywords/execution-time","display_name":"Execution time","score":0.36493003368377686},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.35824429988861084},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.11455079913139343},{"id":"https://openalex.org/keywords/channel","display_name":"Channel (broadcasting)","score":0.0854368805885315}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8642973899841309},{"id":"https://openalex.org/C2780451532","wikidata":"https://www.wikidata.org/wiki/Q759676","display_name":"Task (project management)","level":2,"score":0.7038393616676331},{"id":"https://openalex.org/C200130814","wikidata":"https://www.wikidata.org/wiki/Q362858","display_name":"Worst-case execution time","level":3,"score":0.6546118855476379},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.6244804859161377},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.5748118162155151},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5206498503684998},{"id":"https://openalex.org/C32022120","wikidata":"https://www.wikidata.org/wiki/Q797225","display_name":"Interference (communication)","level":3,"score":0.4879447817802429},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.47533440589904785},{"id":"https://openalex.org/C93682380","wikidata":"https://www.wikidata.org/wiki/Q2025226","display_name":"Static timing analysis","level":2,"score":0.4706648588180542},{"id":"https://openalex.org/C2776359362","wikidata":"https://www.wikidata.org/wiki/Q2145286","display_name":"Representation (politics)","level":3,"score":0.4518621861934662},{"id":"https://openalex.org/C77553402","wikidata":"https://www.wikidata.org/wiki/Q13222579","display_name":"Upper and lower bounds","level":2,"score":0.412602037191391},{"id":"https://openalex.org/C2989134064","wikidata":"https://www.wikidata.org/wiki/Q288510","display_name":"Execution time","level":2,"score":0.36493003368377686},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.35824429988861084},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.11455079913139343},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.0854368805885315},{"id":"https://openalex.org/C94625758","wikidata":"https://www.wikidata.org/wiki/Q7163","display_name":"Politics","level":2,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C17744445","wikidata":"https://www.wikidata.org/wiki/Q36442","display_name":"Political science","level":0,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C187736073","wikidata":"https://www.wikidata.org/wiki/Q2920921","display_name":"Management","level":1,"score":0.0},{"id":"https://openalex.org/C199539241","wikidata":"https://www.wikidata.org/wiki/Q7748","display_name":"Law","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/date.2010.5456952","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2010.5456952","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 Design, Automation &amp; Test in Europe Conference &amp; Exhibition (DATE 2010)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W2022245712","https://openalex.org/W2108024087","https://openalex.org/W2124262702","https://openalex.org/W2124831651","https://openalex.org/W2135362168","https://openalex.org/W2139978798","https://openalex.org/W2147206873","https://openalex.org/W2152652772","https://openalex.org/W3145794024","https://openalex.org/W6682561779","https://openalex.org/W6682584042"],"related_works":["https://openalex.org/W136631479","https://openalex.org/W2098932080","https://openalex.org/W2742764916","https://openalex.org/W2163202742","https://openalex.org/W2607723214","https://openalex.org/W3130041341","https://openalex.org/W1549916137","https://openalex.org/W2156929691","https://openalex.org/W1543783659","https://openalex.org/W2390473631"],"abstract_inverted_index":{"Employing":[0],"COTS":[1],"components":[2],"in":[3],"real-time":[4],"embedded":[5],"systems":[6],"leads":[7],"to":[8,23,44,48,89,108],"timing":[9],"challenges.":[10],"When":[11],"multiple":[12],"CPU":[13],"cores":[14],"and":[15],"DMA":[16],"peripherals":[17],"run":[18],"simultaneously,":[19],"contention":[20],"for":[21,57,84],"access":[22],"main":[24],"memory":[25,49,63],"can":[26,103],"greatly":[27],"increase":[28],"a":[29,78,91],"task's":[30],"WCET.":[31],"In":[32],"this":[33],"paper,":[34],"we":[35,99],"introduce":[36],"an":[37,52],"analysis":[38,88],"methodology":[39],"that":[40],"computes":[41],"upper":[42],"bounds":[43],"task":[45,86],"delay":[46,92],"due":[47],"contention.":[50],"First,":[51],"arrival":[53],"curve":[54],"is":[55],"derived":[56],"each":[58,113],"core":[59],"representing":[60],"the":[61,81,85,96],"maximum":[62],"traffic":[64],"produced":[65],"by":[66],"all":[67],"tasks":[68,102],"executed":[69],"on":[70,95,112],"it.":[71],"Arrival":[72],"curves":[73],"are":[74],"then":[75],"combined":[76],"with":[77],"representation":[79],"of":[80],"cache":[82],"behavior":[83],"under":[87],"generate":[90],"bound.":[93],"Based":[94],"computed":[97],"delay,":[98],"show":[100],"how":[101],"be":[104],"feasibly":[105],"scheduled":[106],"according":[107],"assigned":[109],"time":[110],"slots":[111],"core.":[114]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":3},{"year":2023,"cited_by_count":9},{"year":2022,"cited_by_count":11},{"year":2021,"cited_by_count":11},{"year":2020,"cited_by_count":5},{"year":2019,"cited_by_count":5},{"year":2018,"cited_by_count":8},{"year":2017,"cited_by_count":11},{"year":2016,"cited_by_count":11},{"year":2015,"cited_by_count":10},{"year":2014,"cited_by_count":8},{"year":2013,"cited_by_count":8},{"year":2012,"cited_by_count":5}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
