{"id":"https://openalex.org/W3150916971","doi":"https://doi.org/10.1109/date.2010.5456948","title":"An error-correcting unordered code and hardware support for robust asynchronous global communication","display_name":"An error-correcting unordered code and hardware support for robust asynchronous global communication","publication_year":2010,"publication_date":"2010-03-01","ids":{"openalex":"https://openalex.org/W3150916971","doi":"https://doi.org/10.1109/date.2010.5456948","mag":"3150916971"},"language":"en","primary_location":{"id":"doi:10.1109/date.2010.5456948","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2010.5456948","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5042729523","display_name":"Melinda Y. Agyekum","orcid":null},"institutions":[{"id":"https://openalex.org/I78577930","display_name":"Columbia University","ror":"https://ror.org/00hj8s172","country_code":"US","type":"education","lineage":["https://openalex.org/I78577930"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Melinda Y Agyekum","raw_affiliation_strings":["Department of Computer Science, Columbia University, New York, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science, Columbia University, New York, NY, USA","institution_ids":["https://openalex.org/I78577930"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5023548648","display_name":"Steven M. Nowick","orcid":"https://orcid.org/0000-0002-8837-8109"},"institutions":[{"id":"https://openalex.org/I78577930","display_name":"Columbia University","ror":"https://ror.org/00hj8s172","country_code":"US","type":"education","lineage":["https://openalex.org/I78577930"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Steven M Nowick","raw_affiliation_strings":["Department of Computer Science, Columbia University, New York, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science, Columbia University, New York, NY, USA","institution_ids":["https://openalex.org/I78577930"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I78577930"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":11,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"765","last_page":"770"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8231117725372314},{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.6562173366546631},{"id":"https://openalex.org/keywords/encoder","display_name":"Encoder","score":0.6030148863792419},{"id":"https://openalex.org/keywords/error-detection-and-correction","display_name":"Error detection and correction","score":0.5485246777534485},{"id":"https://openalex.org/keywords/skew","display_name":"Skew","score":0.4619129002094269},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.44677969813346863},{"id":"https://openalex.org/keywords/low-density-parity-check-code","display_name":"Low-density parity-check code","score":0.4461183547973633},{"id":"https://openalex.org/keywords/network-packet","display_name":"Network packet","score":0.42495372891426086},{"id":"https://openalex.org/keywords/robustness","display_name":"Robustness (evolution)","score":0.4220537543296814},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.36964255571365356},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.34145790338516235},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.34113672375679016},{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.3060871362686157},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.12111315131187439}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8231117725372314},{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.6562173366546631},{"id":"https://openalex.org/C118505674","wikidata":"https://www.wikidata.org/wiki/Q42586063","display_name":"Encoder","level":2,"score":0.6030148863792419},{"id":"https://openalex.org/C103088060","wikidata":"https://www.wikidata.org/wiki/Q1062839","display_name":"Error detection and correction","level":2,"score":0.5485246777534485},{"id":"https://openalex.org/C43711488","wikidata":"https://www.wikidata.org/wiki/Q7534783","display_name":"Skew","level":2,"score":0.4619129002094269},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.44677969813346863},{"id":"https://openalex.org/C67692717","wikidata":"https://www.wikidata.org/wiki/Q187444","display_name":"Low-density parity-check code","level":3,"score":0.4461183547973633},{"id":"https://openalex.org/C158379750","wikidata":"https://www.wikidata.org/wiki/Q214111","display_name":"Network packet","level":2,"score":0.42495372891426086},{"id":"https://openalex.org/C63479239","wikidata":"https://www.wikidata.org/wiki/Q7353546","display_name":"Robustness (evolution)","level":3,"score":0.4220537543296814},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.36964255571365356},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.34145790338516235},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.34113672375679016},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.3060871362686157},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.12111315131187439},{"id":"https://openalex.org/C104317684","wikidata":"https://www.wikidata.org/wiki/Q7187","display_name":"Gene","level":2,"score":0.0},{"id":"https://openalex.org/C55493867","wikidata":"https://www.wikidata.org/wiki/Q7094","display_name":"Biochemistry","level":1,"score":0.0},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/date.2010.5456948","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2010.5456948","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.41999998688697815,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":30,"referenced_works":["https://openalex.org/W1535891768","https://openalex.org/W1609287256","https://openalex.org/W1769133684","https://openalex.org/W1858188314","https://openalex.org/W1980073965","https://openalex.org/W1999082644","https://openalex.org/W2031011305","https://openalex.org/W2033724727","https://openalex.org/W2037181413","https://openalex.org/W2047452662","https://openalex.org/W2062988300","https://openalex.org/W2100451046","https://openalex.org/W2102346142","https://openalex.org/W2118059704","https://openalex.org/W2120063249","https://openalex.org/W2126511795","https://openalex.org/W2128842040","https://openalex.org/W2139882509","https://openalex.org/W2145806390","https://openalex.org/W2151415616","https://openalex.org/W2154105840","https://openalex.org/W2161913691","https://openalex.org/W2165072326","https://openalex.org/W2174635824","https://openalex.org/W4244734802","https://openalex.org/W4247998816","https://openalex.org/W6638190992","https://openalex.org/W6662447990","https://openalex.org/W6678048506","https://openalex.org/W6681464537"],"related_works":["https://openalex.org/W2903058006","https://openalex.org/W2102374550","https://openalex.org/W2047069332","https://openalex.org/W2352157218","https://openalex.org/W4290802965","https://openalex.org/W2806845321","https://openalex.org/W4225319325","https://openalex.org/W2124455219","https://openalex.org/W2394408226","https://openalex.org/W4389168214"],"abstract_inverted_index":{"A":[0,63,77],"new":[1,119],"delay-insensitive":[2,23],"data":[3,69],"encoding":[4],"scheme":[5],"for":[6,80,91,130,188],"global":[7],"asynchronous":[8],"communication":[9],"is":[10,17,66,84,106],"introduced.":[11],"The":[12,33],"goal":[13],"of":[14,22,30,49,98,143],"this":[15],"work":[16],"to":[18,111,124,184],"combine":[19],"the":[20,28,75,82,92,99,112,118,144,154,177],"timing-robustness":[21],"(i.e.,":[24],"unordered)":[25],"codes":[26,181],"with":[27,134,153],"fault-tolerance":[29],"error-correcting":[31,35],"codes.":[32],"proposed":[34],"unordered":[36],"(ECU)":[37],"code,":[38,117],"called":[39],"Zero-Sum,":[40],"can":[41,70],"safely":[42],"accommodate":[43],"arbitrary":[44],"skew":[45],"in":[46,52,127],"arrival":[47],"times":[48],"individual":[50],"bits":[51],"a":[53,122,160],"packet,":[54],"while":[55,176],"simultaneously":[56],"providing":[57],"1-bit":[58],"correction":[59],"and":[60,102,173],"2-bit":[61],"detection.":[62],"systematic":[64,115],"code":[65,83,120],"targeted,":[67],"where":[68],"be":[71],"directly":[72],"extracted":[73],"from":[74],"codewords.":[76],"basic":[78],"method":[79],"generating":[81],"presented,":[85],"as":[86,88],"well":[87],"detailed":[89],"designs":[90],"supporting":[93,145],"hardware":[94,146],"blocks.":[95],"An":[96],"outline":[97],"system":[100],"micro-architecture":[101],"its":[103],"operating":[104],"protocol":[105],"also":[107],"given.":[108],"When":[109],"compared":[110],"best":[113,178],"previous":[114],"ECU":[116,180],"provides":[121],"5.74":[123],"18.18%":[125],"reduction":[126],"transition":[128],"power":[129],"most":[131],"field":[132,190],"sizes,":[133],"better":[135],"or":[136],"comparable":[137],"coding":[138],"efficiency.":[139],"Pre-layout":[140],"technology-mapped":[141],"implementations":[142],"(encoder,":[147],"completion":[148],"detector,":[149],"error-corrector)":[150],"were":[151],"synthesized":[152],"UC":[155],"Berkeley":[156],"ABC":[157],"tool":[158],"using":[159],"90nm":[161],"industrial":[162],"standard":[163],"cell":[164],"library.":[165],"Results":[166],"indicate":[167],"that":[168],"they":[169],"have":[170,182],"moderate":[171],"area":[172,187],"delay":[174],"overheads,":[175],"non-systematic":[179],"3.82":[183],"10.44x":[185],"greater":[186],"larger":[189],"sizes.":[191]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":5},{"year":2012,"cited_by_count":2}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}