{"id":"https://openalex.org/W3145382001","doi":"https://doi.org/10.1109/date.2009.5090798","title":"A novel DRAM architecture as a low leakage alternative for SRAM caches in a 3D interconnect context.","display_name":"A novel DRAM architecture as a low leakage alternative for SRAM caches in a 3D interconnect context.","publication_year":2009,"publication_date":"2009-04-01","ids":{"openalex":"https://openalex.org/W3145382001","doi":"https://doi.org/10.1109/date.2009.5090798","mag":"3145382001"},"language":"en","primary_location":{"id":"doi:10.1109/date.2009.5090798","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2009.5090798","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 Design, Automation & Test in Europe Conference & Exhibition","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5011286561","display_name":"Anselme Vignon","orcid":null},"institutions":[{"id":"https://openalex.org/I99464096","display_name":"KU Leuven","ror":"https://ror.org/05f950310","country_code":"BE","type":"education","lineage":["https://openalex.org/I99464096"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"A. Vignon","raw_affiliation_strings":["K.U. Leuven, ESAT - MICAS Laboratory, Leuven, Belgium"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"K.U. Leuven, ESAT - MICAS Laboratory, Leuven, Belgium","institution_ids":["https://openalex.org/I99464096"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5031630779","display_name":"Stefan Cosemans","orcid":null},"institutions":[{"id":"https://openalex.org/I99464096","display_name":"KU Leuven","ror":"https://ror.org/05f950310","country_code":"BE","type":"education","lineage":["https://openalex.org/I99464096"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"S. Cosemans","raw_affiliation_strings":["K.U. Leuven, ESAT - MICAS Laboratory, Leuven, Belgium"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"K.U. Leuven, ESAT - MICAS Laboratory, Leuven, Belgium","institution_ids":["https://openalex.org/I99464096"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5076274517","display_name":"Wim Dehaene","orcid":"https://orcid.org/0000-0002-6792-7965"},"institutions":[{"id":"https://openalex.org/I99464096","display_name":"KU Leuven","ror":"https://ror.org/05f950310","country_code":"BE","type":"education","lineage":["https://openalex.org/I99464096"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"W. Dehaene","raw_affiliation_strings":["K.U. Leuven, ESAT - MICAS Laboratory, Leuven, Belgium"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"K.U. Leuven, ESAT - MICAS Laboratory, Leuven, Belgium","institution_ids":["https://openalex.org/I99464096"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109152811","display_name":"Pierre Marchal","orcid":null},"institutions":[{"id":"https://openalex.org/I4210114974","display_name":"IMEC","ror":"https://ror.org/02kcbn207","country_code":"BE","type":"nonprofit","lineage":["https://openalex.org/I4210114974"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"P. Marchal","raw_affiliation_strings":["IMEC, Leuven, Belgium"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IMEC, Leuven, Belgium","institution_ids":["https://openalex.org/I4210114974"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5057153631","display_name":"Marco Facchini","orcid":null},"institutions":[{"id":"https://openalex.org/I4210114974","display_name":"IMEC","ror":"https://ror.org/02kcbn207","country_code":"BE","type":"nonprofit","lineage":["https://openalex.org/I4210114974"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"M. Facchini","raw_affiliation_strings":["IMEC, Leuven, Belgium"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IMEC, Leuven, Belgium","institution_ids":["https://openalex.org/I4210114974"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.2207,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.8255605,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"929","last_page":"933"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.8120452761650085},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.7863599061965942},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6248742341995239},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.5962836742401123},{"id":"https://openalex.org/keywords/access-time","display_name":"Access time","score":0.5620842576026917},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.540336012840271},{"id":"https://openalex.org/keywords/context","display_name":"Context (archaeology)","score":0.5074917674064636},{"id":"https://openalex.org/keywords/dynamic-random-access-memory","display_name":"Dynamic random-access memory","score":0.46921029686927795},{"id":"https://openalex.org/keywords/memory-architecture","display_name":"Memory architecture","score":0.4671684503555298},{"id":"https://openalex.org/keywords/energy-consumption","display_name":"Energy consumption","score":0.45469748973846436},{"id":"https://openalex.org/keywords/dynamic-demand","display_name":"Dynamic demand","score":0.42891794443130493},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.37504637241363525},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.33272719383239746},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.2663819193840027},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.20516929030418396},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.1550237238407135},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.14480862021446228}],"concepts":[{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.8120452761650085},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.7863599061965942},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6248742341995239},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.5962836742401123},{"id":"https://openalex.org/C194080101","wikidata":"https://www.wikidata.org/wiki/Q46306","display_name":"Access time","level":2,"score":0.5620842576026917},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.540336012840271},{"id":"https://openalex.org/C2779343474","wikidata":"https://www.wikidata.org/wiki/Q3109175","display_name":"Context (archaeology)","level":2,"score":0.5074917674064636},{"id":"https://openalex.org/C118702147","wikidata":"https://www.wikidata.org/wiki/Q189396","display_name":"Dynamic random-access memory","level":3,"score":0.46921029686927795},{"id":"https://openalex.org/C2779602883","wikidata":"https://www.wikidata.org/wiki/Q15544750","display_name":"Memory architecture","level":2,"score":0.4671684503555298},{"id":"https://openalex.org/C2780165032","wikidata":"https://www.wikidata.org/wiki/Q16869822","display_name":"Energy consumption","level":2,"score":0.45469748973846436},{"id":"https://openalex.org/C45872418","wikidata":"https://www.wikidata.org/wiki/Q5318966","display_name":"Dynamic demand","level":3,"score":0.42891794443130493},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.37504637241363525},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.33272719383239746},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2663819193840027},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.20516929030418396},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.1550237238407135},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.14480862021446228},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/date.2009.5090798","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2009.5090798","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 Design, Automation & Test in Europe Conference & Exhibition","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1753784006","https://openalex.org/W1993160222","https://openalex.org/W2001714442","https://openalex.org/W2062419791","https://openalex.org/W2127190809","https://openalex.org/W2130418369","https://openalex.org/W2145547293","https://openalex.org/W2146437305","https://openalex.org/W2152871432","https://openalex.org/W2565789975","https://openalex.org/W6681867046"],"related_works":["https://openalex.org/W2324809","https://openalex.org/W4232117715","https://openalex.org/W2011998170","https://openalex.org/W2145302308","https://openalex.org/W1966671390","https://openalex.org/W2736277924","https://openalex.org/W2186356227","https://openalex.org/W4205208341","https://openalex.org/W1523409956","https://openalex.org/W2009433924"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,28,59,66,92,108,121],"DRAM":[4,9],"architecture":[5,81],"that":[6],"improves":[7],"the":[8,34,38,45,50,118],"performance/power":[10],"trade-off":[11],"to":[12,42,74],"increase":[13],"their":[14],"usability":[15],"on":[16],"low":[17,61],"power":[18,62,71,114],"chip":[19],"design":[20],"using":[21],"3D":[22],"interconnect":[23],"technology.":[24],"The":[25,53,77],"use":[26],"of":[27,58,88,95,110,123],"finer":[29],"matrix":[30],"subdivision":[31],"and":[32,49,69,120],"buffering":[33],"bitline":[35],"signal":[36],"at":[37],"localblock":[39],"level":[40],"allows":[41,106],"reduce":[43],"both":[44],"energy":[46,94],"per":[47,100],"access":[48,51,86],"time.":[52],"obtained":[54],"performances":[55],"match":[56],"those":[57],"typical":[60],"SRAM,":[63],"while":[64],"achieving":[65],"significant":[67],"area":[68],"static":[70,113],"reduction":[72],"compared":[73,128],"these":[75],"memories.":[76],"128":[78],"kb":[79],"memory":[80],"proposed":[82],"here":[83],"achieves":[84],"an":[85,130],"time":[87],"1.3":[89],"ns":[90],"for":[91],"dynamic":[93],"less":[96],"than":[97],"0.2":[98],"pJ":[99],"bit.":[101],"A":[102],"localized":[103],"refresh":[104],"mechanism":[105],"gaining":[107],"factor":[109,122],"10":[111],"in":[112,125],"consumption":[115],"associated":[116],"with":[117,129],"cell,":[119],"2":[124],"area,":[126],"when":[127],"equivalent":[131],"SRAM.":[132]},"counts_by_year":[{"year":2014,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}