{"id":"https://openalex.org/W3148358593","doi":"https://doi.org/10.1109/date.2008.4484924","title":"Performance-Constrained Different Cell Count Minimization for Continuously-Sized Circuits","display_name":"Performance-Constrained Different Cell Count Minimization for Continuously-Sized Circuits","publication_year":2008,"publication_date":"2008-03-01","ids":{"openalex":"https://openalex.org/W3148358593","doi":"https://doi.org/10.1109/date.2008.4484924","mag":"3148358593"},"language":"en","primary_location":{"id":"doi:10.1109/date.2008.4484924","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2008.4484924","pdf_url":null,"source":{"id":"https://openalex.org/S4363607582","display_name":"2008 Design, Automation and Test in Europe","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 Design, Automation and Test in Europe","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5073098982","display_name":"Hiroaki Yoshida","orcid":"https://orcid.org/0000-0002-5370-7451"},"institutions":[{"id":"https://openalex.org/I4210086780","display_name":"Japan Science and Technology Agency","ror":"https://ror.org/00097mb19","country_code":"JP","type":"government","lineage":["https://openalex.org/I1319490839","https://openalex.org/I4210086780"]},{"id":"https://openalex.org/I74801974","display_name":"The University of Tokyo","ror":"https://ror.org/057zh3y96","country_code":"JP","type":"education","lineage":["https://openalex.org/I74801974"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Hiroaki Yoshida","raw_affiliation_strings":["CREST, Japan Science and Technology Agency, Japan","VLSI Design and Education Center (VDEC), University of Tokyo, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"CREST, Japan Science and Technology Agency, Japan","institution_ids":["https://openalex.org/I4210086780"]},{"raw_affiliation_string":"VLSI Design and Education Center (VDEC), University of Tokyo, Japan","institution_ids":["https://openalex.org/I74801974"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5027837299","display_name":"Masahiro Fujita","orcid":"https://orcid.org/0000-0002-6516-4175"},"institutions":[{"id":"https://openalex.org/I4210086780","display_name":"Japan Science and Technology Agency","ror":"https://ror.org/00097mb19","country_code":"JP","type":"government","lineage":["https://openalex.org/I1319490839","https://openalex.org/I4210086780"]},{"id":"https://openalex.org/I74801974","display_name":"The University of Tokyo","ror":"https://ror.org/057zh3y96","country_code":"JP","type":"education","lineage":["https://openalex.org/I74801974"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Masahiro Fujita","raw_affiliation_strings":["CREST, Japan Science and Technology Agency, Japan","VLSI Design and Education Center (VDEC), University of Tokyo, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"CREST, Japan Science and Technology Agency, Japan","institution_ids":["https://openalex.org/I4210086780"]},{"raw_affiliation_string":"VLSI Design and Education Center (VDEC), University of Tokyo, Japan","institution_ids":["https://openalex.org/I74801974"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1099","last_page":"1102"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/minification","display_name":"Minification","score":0.7576382160186768},{"id":"https://openalex.org/keywords/heuristic","display_name":"Heuristic","score":0.6569256782531738},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6332359313964844},{"id":"https://openalex.org/keywords/sizing","display_name":"Sizing","score":0.6151670813560486},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5749506950378418},{"id":"https://openalex.org/keywords/transistor-count","display_name":"Transistor count","score":0.5464200377464294},{"id":"https://openalex.org/keywords/mathematical-optimization","display_name":"Mathematical optimization","score":0.4943263530731201},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.43163472414016724},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4147895872592926},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.3773181438446045},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.32978495955467224},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.24414998292922974},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.15036115050315857},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.13906458020210266},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.13771918416023254},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.11683344841003418}],"concepts":[{"id":"https://openalex.org/C147764199","wikidata":"https://www.wikidata.org/wiki/Q6865248","display_name":"Minification","level":2,"score":0.7576382160186768},{"id":"https://openalex.org/C173801870","wikidata":"https://www.wikidata.org/wiki/Q201413","display_name":"Heuristic","level":2,"score":0.6569256782531738},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6332359313964844},{"id":"https://openalex.org/C2777767291","wikidata":"https://www.wikidata.org/wiki/Q1080291","display_name":"Sizing","level":2,"score":0.6151670813560486},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5749506950378418},{"id":"https://openalex.org/C196320899","wikidata":"https://www.wikidata.org/wiki/Q2623746","display_name":"Transistor count","level":4,"score":0.5464200377464294},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.4943263530731201},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.43163472414016724},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4147895872592926},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.3773181438446045},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.32978495955467224},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.24414998292922974},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.15036115050315857},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.13906458020210266},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.13771918416023254},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.11683344841003418},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/date.2008.4484924","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2008.4484924","pdf_url":null,"source":{"id":"https://openalex.org/S4363607582","display_name":"2008 Design, Automation and Test in Europe","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 Design, Automation and Test in Europe","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/11","display_name":"Sustainable cities and communities","score":0.4300000071525574}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1569550779","https://openalex.org/W1992651809","https://openalex.org/W2104491047","https://openalex.org/W2123871098","https://openalex.org/W2135250302","https://openalex.org/W4231119589","https://openalex.org/W4236748610","https://openalex.org/W4297399141","https://openalex.org/W6634336121"],"related_works":["https://openalex.org/W2375311683","https://openalex.org/W2366062860","https://openalex.org/W2373777250","https://openalex.org/W2353956655","https://openalex.org/W2020653254","https://openalex.org/W1965473775","https://openalex.org/W2526565644","https://openalex.org/W2156630798","https://openalex.org/W2129502787","https://openalex.org/W4378374359"],"abstract_inverted_index":{"A":[0],"continuously-sized":[1],"circuit":[2],"resulting":[3],"from":[4],"transistor":[5],"sizing":[6],"consists":[7],"of":[8,13,24,43,57],"gates":[9],"with":[10],"large":[11],"variety":[12],"sizes.":[14],"In":[15],"this":[16,60],"paper,":[17],"we":[18],"first":[19,63],"provide":[20],"a":[21],"formal":[22],"formulation":[23],"performance-constrained":[25],"different":[26,68],"cell":[27,69],"count":[28,70],"minimization":[29,71],"problem,":[30],"and":[31,52],"then":[32],"propose":[33],"an":[34],"effective":[35],"hill-climbing":[36],"heuristic":[37],"which":[38],"iteratively":[39],"minimizes":[40],"the":[41,55,62,67],"number":[42],"cells":[44],"under":[45],"performance":[46],"constraints":[47],"such":[48],"as":[49],"area,":[50],"delay":[51],"power.":[53],"To":[54],"best":[56],"our":[58],"knowledge,":[59],"is":[61],"attempt":[64],"to":[65],"address":[66],"problem.":[72]},"counts_by_year":[],"updated_date":"2026-07-22T07:51:19.307946","created_date":"2025-10-10T00:00:00"}
