{"id":"https://openalex.org/W4232182869","doi":"https://doi.org/10.1109/date.2008.4484813","title":"Design Guidelines for Metallic-Carbon-Nanotube-Tolerant Digital Logic Circuits","display_name":"Design Guidelines for Metallic-Carbon-Nanotube-Tolerant Digital Logic Circuits","publication_year":2008,"publication_date":"2008-03-01","ids":{"openalex":"https://openalex.org/W4232182869","doi":"https://doi.org/10.1109/date.2008.4484813"},"language":"en","primary_location":{"id":"doi:10.1109/date.2008.4484813","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2008.4484813","pdf_url":null,"source":{"id":"https://openalex.org/S4363607582","display_name":"2008 Design, Automation and Test in Europe","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 Design, Automation and Test in Europe","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100436809","display_name":"Jie Zhang","orcid":"https://orcid.org/0000-0002-8311-370X"},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Jie Zhang","raw_affiliation_strings":["University of Stanford, Stanford, CA, USA"],"affiliations":[{"raw_affiliation_string":"University of Stanford, Stanford, CA, USA","institution_ids":["https://openalex.org/I97018004"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5037285672","display_name":"Nishant Patil","orcid":"https://orcid.org/0000-0001-6620-0038"},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Nishant P. Patil","raw_affiliation_strings":["University of Stanford, Stanford, CA, USA"],"affiliations":[{"raw_affiliation_string":"University of Stanford, Stanford, CA, USA","institution_ids":["https://openalex.org/I97018004"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5036312663","display_name":"Subhasish Mitra","orcid":"https://orcid.org/0000-0002-5572-5194"},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Subhasish Mitra","raw_affiliation_strings":["University of Stanford, Stanford, CA, USA"],"affiliations":[{"raw_affiliation_string":"University of Stanford, Stanford, CA, USA","institution_ids":["https://openalex.org/I97018004"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5100436809"],"corresponding_institution_ids":["https://openalex.org/I97018004"],"apc_list":null,"apc_paid":null,"fwci":6.4361,"has_fulltext":false,"cited_by_count":11,"citation_normalized_percentile":{"value":0.97231969,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":94,"max":96},"biblio":{"volume":"314","issue":null,"first_page":"1009","last_page":"1014"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10074","display_name":"Carbon Nanotubes in Composites","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2505","display_name":"Materials Chemistry"},"field":{"id":"https://openalex.org/fields/25","display_name":"Materials Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/carbon-nanotube","display_name":"Carbon nanotube","score":0.7789281606674194},{"id":"https://openalex.org/keywords/carbon-nanotube-field-effect-transistor","display_name":"Carbon nanotube field-effect transistor","score":0.7398954629898071},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.6563410758972168},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.5374249815940857},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5165097117424011},{"id":"https://openalex.org/keywords/noise-margin","display_name":"Noise margin","score":0.5136582255363464},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.5110929608345032},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.4872685670852661},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4738885760307312},{"id":"https://openalex.org/keywords/field-effect-transistor","display_name":"Field-effect transistor","score":0.4706681966781616},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4282422661781311},{"id":"https://openalex.org/keywords/leakage","display_name":"Leakage (economics)","score":0.4255490303039551},{"id":"https://openalex.org/keywords/probabilistic-logic","display_name":"Probabilistic logic","score":0.42210516333580017},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.4187735319137573},{"id":"https://openalex.org/keywords/nanotechnology","display_name":"Nanotechnology","score":0.4004718065261841},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2748521566390991},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.16298136115074158},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.15018320083618164},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.132980614900589}],"concepts":[{"id":"https://openalex.org/C513720949","wikidata":"https://www.wikidata.org/wiki/Q1778729","display_name":"Carbon nanotube","level":2,"score":0.7789281606674194},{"id":"https://openalex.org/C58916441","wikidata":"https://www.wikidata.org/wiki/Q1778563","display_name":"Carbon nanotube field-effect transistor","level":5,"score":0.7398954629898071},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.6563410758972168},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.5374249815940857},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5165097117424011},{"id":"https://openalex.org/C179499742","wikidata":"https://www.wikidata.org/wiki/Q1324892","display_name":"Noise margin","level":4,"score":0.5136582255363464},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.5110929608345032},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.4872685670852661},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4738885760307312},{"id":"https://openalex.org/C145598152","wikidata":"https://www.wikidata.org/wiki/Q176097","display_name":"Field-effect transistor","level":4,"score":0.4706681966781616},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4282422661781311},{"id":"https://openalex.org/C2777042071","wikidata":"https://www.wikidata.org/wiki/Q6509304","display_name":"Leakage (economics)","level":2,"score":0.4255490303039551},{"id":"https://openalex.org/C49937458","wikidata":"https://www.wikidata.org/wiki/Q2599292","display_name":"Probabilistic logic","level":2,"score":0.42210516333580017},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.4187735319137573},{"id":"https://openalex.org/C171250308","wikidata":"https://www.wikidata.org/wiki/Q11468","display_name":"Nanotechnology","level":1,"score":0.4004718065261841},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2748521566390991},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.16298136115074158},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.15018320083618164},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.132980614900589},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/date.2008.4484813","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2008.4484813","pdf_url":null,"source":{"id":"https://openalex.org/S4363607582","display_name":"2008 Design, Automation and Test in Europe","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 Design, Automation and Test in Europe","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.4099999964237213,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W1534416617","https://openalex.org/W1560640234","https://openalex.org/W1603422789","https://openalex.org/W1964189680","https://openalex.org/W1968487830","https://openalex.org/W1981374083","https://openalex.org/W1991561423","https://openalex.org/W2002453109","https://openalex.org/W2022451925","https://openalex.org/W2032324308","https://openalex.org/W2037921569","https://openalex.org/W2146669227","https://openalex.org/W2154054117","https://openalex.org/W2171187927","https://openalex.org/W2172161464","https://openalex.org/W2539132847","https://openalex.org/W6636268624","https://openalex.org/W6685152333"],"related_works":["https://openalex.org/W2547634696","https://openalex.org/W2570275273","https://openalex.org/W2317479535","https://openalex.org/W1976161475","https://openalex.org/W1579695216","https://openalex.org/W3124581103","https://openalex.org/W2146902916","https://openalex.org/W2040623373","https://openalex.org/W1481622942","https://openalex.org/W1976780206"],"abstract_inverted_index":{"Metallic":[0],"carbon":[1,8],"nanotubes":[2],"(CNTs)":[3],"create":[4],"source-drain":[5],"shorts":[6],"in":[7],"nanotube":[9],"field":[10],"effect":[11],"transistors":[12],"(CNFETs),":[13],"causing":[14],"excessive":[15],"leakage,":[16,105],"degraded":[17],"noise":[18,106],"margin":[19,107],"and":[20,49,84,91,108],"delay":[21,109],"variation.":[22],"There":[23],"is":[24],"no":[25],"known":[26],"CNT":[27,37,63],"growth":[28],"technique":[29],"that":[30,94],"guarantees":[31],"0%":[32],"metallic":[33,36,62],"CNTs.":[34],"Therefore,":[35],"removal":[38,44,64],"techniques":[39,45,60],"are":[40,47,113],"necessary.":[41],"Unfortunately,":[42],"such":[43,82],"alone":[46],"imperfect":[48],"insufficient.":[50],"This":[51],"paper":[52],"demonstrates":[53],"the":[54,79,86],"necessity":[55],"for":[56,61,81,115],"co-optimization":[57],"of":[58,97],"processing":[59,92],"together":[65],"with":[66,101],"CNFET-based":[67,98],"circuit":[68,75],"design.":[69],"We":[70],"present":[71],"a":[72],"probabilistic":[73],"CNFET":[74],"model":[76,87],"which":[77],"forms":[78],"basis":[80],"co-optimization,":[83],"use":[85],"to":[88],"derive":[89],"design":[90,96],"guidelines":[93,112],"enable":[95],"digital":[99,120],"circuits":[100],"practical":[102],"constraints":[103],"on":[104],"variations.":[110],"These":[111],"essential":[114],"designing":[116],"robust":[117],"metallic-":[118],"carbon-nanotube-tolerant":[119],"circuits.":[121]},"counts_by_year":[{"year":2012,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
