{"id":"https://openalex.org/W3140902763","doi":"https://doi.org/10.1109/date.2008.4484806","title":"Process Variation Tolerant Pipeline Design Through a Placement-Aware Multiple Voltage Island Design Style","display_name":"Process Variation Tolerant Pipeline Design Through a Placement-Aware Multiple Voltage Island Design Style","publication_year":2008,"publication_date":"2008-03-01","ids":{"openalex":"https://openalex.org/W3140902763","doi":"https://doi.org/10.1109/date.2008.4484806","mag":"3140902763"},"language":"en","primary_location":{"id":"doi:10.1109/date.2008.4484806","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2008.4484806","pdf_url":null,"source":{"id":"https://openalex.org/S4363607582","display_name":"2008 Design, Automation and Test in Europe","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 Design, Automation and Test in Europe","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5049462974","display_name":"Bonesi Stefano","orcid":null},"institutions":[{"id":"https://openalex.org/I201324441","display_name":"University of Ferrara","ror":"https://ror.org/041zkgm14","country_code":"IT","type":"education","lineage":["https://openalex.org/I201324441"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Bonesi Stefano","raw_affiliation_strings":["Universita degli Studi di Ferrara, Ferrara, Emilia-Romagna, IT"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Universita degli Studi di Ferrara, Ferrara, Emilia-Romagna, IT","institution_ids":["https://openalex.org/I201324441"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5011268330","display_name":"Davide Bertozzi","orcid":"https://orcid.org/0000-0001-7462-4551"},"institutions":[{"id":"https://openalex.org/I201324441","display_name":"University of Ferrara","ror":"https://ror.org/041zkgm14","country_code":"IT","type":"education","lineage":["https://openalex.org/I201324441"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Davide Bertozzi","raw_affiliation_strings":["Universita degli Studi di Ferrara, Ferrara, Emilia-Romagna, IT"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Universita degli Studi di Ferrara, Ferrara, Emilia-Romagna, IT","institution_ids":["https://openalex.org/I201324441"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043408422","display_name":"Luca Benini","orcid":"https://orcid.org/0000-0001-8068-3806"},"institutions":[{"id":"https://openalex.org/I9360294","display_name":"University of Bologna","ror":"https://ror.org/01111rn36","country_code":"IT","type":"education","lineage":["https://openalex.org/I9360294"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Luca Benini","raw_affiliation_strings":["DEIS, University of Bologna, Bologna, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"DEIS, University of Bologna, Bologna, Italy","institution_ids":["https://openalex.org/I9360294"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5005432629","display_name":"Enrico Macii","orcid":"https://orcid.org/0000-0001-9046-5618"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Enrico Macii","raw_affiliation_strings":["DAUIN, Politecnico di Torino, Torino, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"DAUIN, Politecnico di Torino, Torino, Italy","institution_ids":["https://openalex.org/I177477856"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":3.7954,"has_fulltext":false,"cited_by_count":11,"citation_normalized_percentile":{"value":0.94485315,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"967","last_page":"972"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.7242200970649719},{"id":"https://openalex.org/keywords/process-variation","display_name":"Process variation","score":0.6388224959373474},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.5854180455207825},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.551606297492981},{"id":"https://openalex.org/keywords/process-corners","display_name":"Process corners","score":0.5086511373519897},{"id":"https://openalex.org/keywords/design-process","display_name":"Design process","score":0.48993033170700073},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.4684227705001831},{"id":"https://openalex.org/keywords/pipeline","display_name":"Pipeline (software)","score":0.4632588028907776},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.4550912380218506},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.4525319039821625},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.3603518605232239},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.35139235854148865},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2698705792427063},{"id":"https://openalex.org/keywords/work-in-process","display_name":"Work in process","score":0.2129494547843933},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.21162199974060059}],"concepts":[{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.7242200970649719},{"id":"https://openalex.org/C93389723","wikidata":"https://www.wikidata.org/wiki/Q7247313","display_name":"Process variation","level":3,"score":0.6388224959373474},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.5854180455207825},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.551606297492981},{"id":"https://openalex.org/C192615534","wikidata":"https://www.wikidata.org/wiki/Q7247268","display_name":"Process corners","level":3,"score":0.5086511373519897},{"id":"https://openalex.org/C48262172","wikidata":"https://www.wikidata.org/wiki/Q16908765","display_name":"Design process","level":3,"score":0.48993033170700073},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.4684227705001831},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.4632588028907776},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.4550912380218506},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.4525319039821625},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.3603518605232239},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.35139235854148865},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2698705792427063},{"id":"https://openalex.org/C174998907","wikidata":"https://www.wikidata.org/wiki/Q357662","display_name":"Work in process","level":2,"score":0.2129494547843933},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.21162199974060059},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/date.2008.4484806","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2008.4484806","pdf_url":null,"source":{"id":"https://openalex.org/S4363607582","display_name":"2008 Design, Automation and Test in Europe","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 Design, Automation and Test in Europe","raw_type":"proceedings-article"},{"id":"pmh:oai:sfera.unife.it:11392/534177","is_oa":false,"landing_page_url":"http://hdl.handle.net/11392/534177","pdf_url":null,"source":{"id":"https://openalex.org/S4306400369","display_name":"Institutional Research Information System University of Ferrara (University of Ferrara)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I201324441","host_organization_name":"University of Ferrara","host_organization_lineage":["https://openalex.org/I201324441"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.46000000834465027,"id":"https://metadata.un.org/sdg/13","display_name":"Climate action"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":22,"referenced_works":["https://openalex.org/W1506585561","https://openalex.org/W2033443176","https://openalex.org/W2042526156","https://openalex.org/W2058427998","https://openalex.org/W2059941121","https://openalex.org/W2101301454","https://openalex.org/W2102587899","https://openalex.org/W2107566947","https://openalex.org/W2107766185","https://openalex.org/W2116359224","https://openalex.org/W2126564504","https://openalex.org/W2161747389","https://openalex.org/W2166751677","https://openalex.org/W2168674623","https://openalex.org/W2169596342","https://openalex.org/W3150134984","https://openalex.org/W4236432903","https://openalex.org/W4238184691","https://openalex.org/W4242812063","https://openalex.org/W4253970385","https://openalex.org/W6678664461","https://openalex.org/W6684841781"],"related_works":["https://openalex.org/W2525077515","https://openalex.org/W2118152793","https://openalex.org/W2141625582","https://openalex.org/W4253195573","https://openalex.org/W2020934033","https://openalex.org/W4388000032","https://openalex.org/W2564437568","https://openalex.org/W2080140894","https://openalex.org/W2107916809","https://openalex.org/W629662700"],"abstract_inverted_index":{"A":[0],"common":[1],"technique":[2,39],"to":[3,40,69],"compensate":[4,70],"process":[5,71],"variation":[6],"induced":[7],"performance":[8,82,121,138],"deviations":[9],"during":[10,98],"post-silicon":[11,99],"testing":[12,100],"consists":[13],"of":[14,18,81,104,108,137],"the":[15,51,101,115],"dynamic":[16],"adaptation":[17],"processor":[19],"voltage.":[20],"This":[21],"however":[22],"comes":[23],"at":[24,89],"a":[25,37,61,74,105],"significant":[26],"power":[27,43],"cost.":[28],"We":[29],"envision":[30],"multi":[31],"supply":[32,102],"voltage":[33,67,103,109],"design":[34,63,90],"(MSV)":[35],"as":[36,50],"promising":[38],"mitigate":[41],"such":[42],"overhead.":[44],"Voltage":[45,126],"islands":[46,68,110,127],"are":[47,87,128],"widely":[48],"recognized":[49],"state-of-the-art":[52],"in":[53,84],"MSV":[54],"design.":[55],"In":[56],"this":[57],"paper,":[58],"we":[59],"develop":[60],"novel":[62],"methodology":[64],"that":[65],"leverages":[66],"variations":[72],"through":[73,92],"commercial":[75],"synthesis":[76],"flow.":[77],"Possible":[78],"violation":[79,117],"scenarios":[80],"requirements":[83],"fabricated":[85],"chips":[86],"pre-characterized":[88],"time":[91],"statistical":[93],"static":[94],"timing":[95],"analysis.":[96],"Then,":[97],"proper":[106],"number":[107],"is":[111],"raised":[112],"depending":[113],"on":[114],"actual":[116],"scenario,":[118],"thus":[119],"bringing":[120],"back":[122],"within":[123],"nominal":[124],"values.":[125],"generated":[129],"by":[130],"exploiting":[131],"cell":[132],"proximity":[133],"for":[134],"minimal":[135],"perturbation":[136],"pre-optimized":[139],"placements.":[140]},"counts_by_year":[{"year":2018,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}