{"id":"https://openalex.org/W3149257740","doi":"https://doi.org/10.1109/date.2008.4484800","title":"Implications of Technology Trends on System Dependability","display_name":"Implications of Technology Trends on System Dependability","publication_year":2008,"publication_date":"2008-03-01","ids":{"openalex":"https://openalex.org/W3149257740","doi":"https://doi.org/10.1109/date.2008.4484800","mag":"3149257740"},"language":"en","primary_location":{"id":"doi:10.1109/date.2008.4484800","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2008.4484800","pdf_url":null,"source":{"id":"https://openalex.org/S4363607582","display_name":"2008 Design, Automation and Test in Europe","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 Design, Automation and Test in Europe","raw_type":"proceedings-article"},"type":"conference-abstract","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5068070739","display_name":"Jacob A. Abraham","orcid":"https://orcid.org/0000-0002-5336-5631"},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Jacob A. Abraham","raw_affiliation_strings":["University of Texas, Austin, Austin, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Texas, Austin, Austin, TX, USA","institution_ids":["https://openalex.org/I86519309"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5068070739"],"corresponding_institution_ids":["https://openalex.org/I86519309"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"940","last_page":"940"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9922000169754028,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9922000169754028,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9907000064849854,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.983299970626831,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dependability","display_name":"Dependability","score":0.9458397626876831},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5195451378822327},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.5115559697151184},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.5072922110557556},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.49758198857307434},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.49571549892425537},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.461238831281662},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.43554627895355225},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.39039912819862366},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.35231104493141174},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.2937571406364441},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2652454674243927},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.13633853197097778}],"concepts":[{"id":"https://openalex.org/C77019957","wikidata":"https://www.wikidata.org/wiki/Q2689057","display_name":"Dependability","level":2,"score":0.9458397626876831},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5195451378822327},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.5115559697151184},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.5072922110557556},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.49758198857307434},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.49571549892425537},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.461238831281662},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.43554627895355225},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.39039912819862366},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.35231104493141174},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.2937571406364441},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2652454674243927},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.13633853197097778},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/date.2008.4484800","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2008.4484800","pdf_url":null,"source":{"id":"https://openalex.org/S4363607582","display_name":"2008 Design, Automation and Test in Europe","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 Design, Automation and Test in Europe","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2169628522","https://openalex.org/W4252527915","https://openalex.org/W2409287660","https://openalex.org/W2233357156","https://openalex.org/W1976489385","https://openalex.org/W2501578203","https://openalex.org/W2113108952","https://openalex.org/W2065289416","https://openalex.org/W2115579119","https://openalex.org/W2017236304"],"abstract_inverted_index":{"CMOS":[0],"has":[1],"been":[2,63],"the":[3,14,22,58,68,74,85],"dominant":[4],"integrated":[5],"circuit":[6],"(IC)":[7],"technology":[8],"for":[9,81],"nearly":[10],"four":[11],"decades,":[12],"following":[13],"trends":[15],"predicted":[16],"by":[17],"Moore's":[18],"Law,":[19],"and":[20,24,31,43,57,70],"fueling":[21],"information":[23],"communication":[25],"revolution.":[26],"As":[27],"chip":[28],"geometries":[29],"decrease":[30],"transistor":[32],"densities":[33],"increase,":[34],"new":[35],"types":[36],"of":[37,73],"faults":[38,56],"-":[39,50],"from":[40],"manufacturing":[41],"defects":[42],"operational":[44],"transients":[45],"to":[46,52],"long-":[47],"term":[48],"wearout":[49],"need":[51],"be":[53],"addressed.":[54],"These":[55],"resulting":[59],"logic":[60],"errors":[61],"have":[62],"dealt":[64],"with":[65,79],"at":[66,84],"both":[67],"low":[69],"high":[71],"levels":[72],"design.":[75],"This":[76],"talk":[77],"deals":[78],"approaches":[80],"improving":[82],"dependability":[83],"system":[86],"level.":[87]},"counts_by_year":[],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
