{"id":"https://openalex.org/W3147798200","doi":"https://doi.org/10.1109/date.2008.4484720","title":"Bandwidth-Centric Optimisation for Area-Constrained Links with Crosstalk Avoidance Methods","display_name":"Bandwidth-Centric Optimisation for Area-Constrained Links with Crosstalk Avoidance Methods","publication_year":2008,"publication_date":"2008-03-01","ids":{"openalex":"https://openalex.org/W3147798200","doi":"https://doi.org/10.1109/date.2008.4484720","mag":"3147798200"},"language":"en","primary_location":{"id":"doi:10.1109/date.2008.4484720","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2008.4484720","pdf_url":null,"source":{"id":"https://openalex.org/S4363607582","display_name":"2008 Design, Automation and Test in Europe","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 Design, Automation and Test in Europe","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5002449223","display_name":"Basel Halak","orcid":"https://orcid.org/0000-0003-3470-7226"},"institutions":[{"id":"https://openalex.org/I84884186","display_name":"Newcastle University","ror":"https://ror.org/01kj2bm70","country_code":"GB","type":"education","lineage":["https://openalex.org/I84884186"]}],"countries":["GB"],"is_corresponding":true,"raw_author_name":"Basel Halak","raw_affiliation_strings":["School of EECE, Newcastle University, UK"],"affiliations":[{"raw_affiliation_string":"School of EECE, Newcastle University, UK","institution_ids":["https://openalex.org/I84884186"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5029446985","display_name":"Alex Yakovlev","orcid":"https://orcid.org/0000-0003-0826-9330"},"institutions":[{"id":"https://openalex.org/I84884186","display_name":"Newcastle University","ror":"https://ror.org/01kj2bm70","country_code":"GB","type":"education","lineage":["https://openalex.org/I84884186"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Alex Yakovlev","raw_affiliation_strings":["School of EECE, Newcastle University, UK"],"affiliations":[{"raw_affiliation_string":"School of EECE, Newcastle University, UK","institution_ids":["https://openalex.org/I84884186"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5002449223"],"corresponding_institution_ids":["https://openalex.org/I84884186"],"apc_list":null,"apc_paid":null,"fwci":1.4319,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.82410296,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"438","last_page":"443"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/crosstalk","display_name":"Crosstalk","score":0.7156479954719543},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6546701192855835},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.5955449342727661},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5751392245292664},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.5150067806243896},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.5066867470741272},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5023057460784912},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3769785165786743},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.16798928380012512},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.1566740870475769},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.10602137446403503},{"id":"https://openalex.org/keywords/wireless","display_name":"Wireless","score":0.08435019850730896}],"concepts":[{"id":"https://openalex.org/C169822122","wikidata":"https://www.wikidata.org/wiki/Q230187","display_name":"Crosstalk","level":2,"score":0.7156479954719543},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6546701192855835},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.5955449342727661},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5751392245292664},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.5150067806243896},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.5066867470741272},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5023057460784912},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3769785165786743},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.16798928380012512},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.1566740870475769},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.10602137446403503},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.08435019850730896}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/date.2008.4484720","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2008.4484720","pdf_url":null,"source":{"id":"https://openalex.org/S4363607582","display_name":"2008 Design, Automation and Test in Europe","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 Design, Automation and Test in Europe","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320334627","display_name":"Engineering and Physical Sciences Research Council","ror":"https://ror.org/0439y7842"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1526835259","https://openalex.org/W2115045032","https://openalex.org/W2117549011","https://openalex.org/W2118567051","https://openalex.org/W2144406075","https://openalex.org/W2166575140","https://openalex.org/W3143002681","https://openalex.org/W4252202715","https://openalex.org/W4252360343","https://openalex.org/W4256356736","https://openalex.org/W6677533950"],"related_works":["https://openalex.org/W3014521742","https://openalex.org/W2622826586","https://openalex.org/W2167472940","https://openalex.org/W2617868873","https://openalex.org/W4280525841","https://openalex.org/W3204141294","https://openalex.org/W2560789951","https://openalex.org/W4386230336","https://openalex.org/W4306968100","https://openalex.org/W2807571008"],"abstract_inverted_index":{"The":[0],"effect":[1],"of":[2,9,19,26,52],"crosstalk":[3],"avoidance":[4],"codes":[5],"on":[6],"the":[7,20,24,27,30,50,68],"throughput":[8,21],"fixed":[10,53],"width":[11,54],"communication":[12],"channels":[13],"is":[14],"studied.":[15],"Closed":[16],"form":[17],"expressions":[18],"which":[22],"incorporate":[23],"dimensions":[25],"interconnects":[28],"and":[29,60],"wires":[31],"overheads":[32],"by":[33,67],"such":[34],"techniques":[35],"are":[36,46,65],"derived":[37],"for":[38,75],"lines":[39],"under":[40,57],"different":[41,58],"buffering":[42],"conditions.":[43],"These":[44],"formulae":[45],"utilised":[47],"to":[48],"optimise":[49],"bandwidth":[51],"parallel":[55],"buses":[56],"latency":[59],"reliability":[61],"constraints.":[62],"Our":[63],"results":[64],"confirmed":[66],"simulations":[69],"we":[70],"have":[71],"performed":[72],"in":[73],"Spectre":[74],"a":[76],"UMC":[77],"CMOS":[78],"90":[79],"nm":[80],"technology.":[81]},"counts_by_year":[{"year":2013,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
