{"id":"https://openalex.org/W3142218480","doi":"https://doi.org/10.1109/date.2008.4484685","title":"An novel Methodology for Reducing SoC Test Data Volume on FPGA-based Testers","display_name":"An novel Methodology for Reducing SoC Test Data Volume on FPGA-based Testers","publication_year":2008,"publication_date":"2008-03-01","ids":{"openalex":"https://openalex.org/W3142218480","doi":"https://doi.org/10.1109/date.2008.4484685","mag":"3142218480"},"language":"en","primary_location":{"id":"doi:10.1109/date.2008.4484685","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2008.4484685","pdf_url":null,"source":{"id":"https://openalex.org/S4363607582","display_name":"2008 Design, Automation and Test in Europe","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 Design, Automation and Test in Europe","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5049430681","display_name":"Paolo Bernardi","orcid":"https://orcid.org/0000-0002-0985-9327"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"P. Bernardi","raw_affiliation_strings":["Politecnico di Torino, IT, Dipartimento di automatica e Informatica"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Politecnico di Torino, IT, Dipartimento di automatica e Informatica","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5058555274","display_name":"M. Sonza Reorda","orcid":"https://orcid.org/0000-0003-2899-7669"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"M. Sonza Reorda","raw_affiliation_strings":["Politecnico di Torino, Torino, Piemonte, IT"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Politecnico di Torino, Torino, Piemonte, IT","institution_ids":["https://openalex.org/I177477856"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I177477856"],"apc_list":null,"apc_paid":null,"fwci":0.1879,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.47057674,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"194","last_page":"199"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13293","display_name":"Engineering and Test Systems","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/test-compression","display_name":"Test compression","score":0.687605619430542},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6748587489128113},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.640976071357727},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6337693929672241},{"id":"https://openalex.org/keywords/volume","display_name":"Volume (thermodynamics)","score":0.5792858004570007},{"id":"https://openalex.org/keywords/test-data","display_name":"Test data","score":0.5205496549606323},{"id":"https://openalex.org/keywords/test","display_name":"Test (biology)","score":0.48631033301353455},{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.48599061369895935},{"id":"https://openalex.org/keywords/automatic-test-equipment","display_name":"Automatic test equipment","score":0.4837363064289093},{"id":"https://openalex.org/keywords/built-in-self-test","display_name":"Built-in self-test","score":0.4452459216117859},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.43766507506370544},{"id":"https://openalex.org/keywords/exploit","display_name":"Exploit","score":0.424201637506485},{"id":"https://openalex.org/keywords/cost-reduction","display_name":"Cost reduction","score":0.4182840585708618},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.37775853276252747},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.33098840713500977},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.24404513835906982},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.08027383685112}],"concepts":[{"id":"https://openalex.org/C29652920","wikidata":"https://www.wikidata.org/wiki/Q7705757","display_name":"Test compression","level":4,"score":0.687605619430542},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6748587489128113},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.640976071357727},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6337693929672241},{"id":"https://openalex.org/C20556612","wikidata":"https://www.wikidata.org/wiki/Q4469374","display_name":"Volume (thermodynamics)","level":2,"score":0.5792858004570007},{"id":"https://openalex.org/C16910744","wikidata":"https://www.wikidata.org/wiki/Q7705759","display_name":"Test data","level":2,"score":0.5205496549606323},{"id":"https://openalex.org/C2777267654","wikidata":"https://www.wikidata.org/wiki/Q3519023","display_name":"Test (biology)","level":2,"score":0.48631033301353455},{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.48599061369895935},{"id":"https://openalex.org/C141842801","wikidata":"https://www.wikidata.org/wiki/Q363815","display_name":"Automatic test equipment","level":3,"score":0.4837363064289093},{"id":"https://openalex.org/C2780980493","wikidata":"https://www.wikidata.org/wiki/Q181142","display_name":"Built-in self-test","level":2,"score":0.4452459216117859},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.43766507506370544},{"id":"https://openalex.org/C165696696","wikidata":"https://www.wikidata.org/wiki/Q11287","display_name":"Exploit","level":2,"score":0.424201637506485},{"id":"https://openalex.org/C2778820799","wikidata":"https://www.wikidata.org/wiki/Q3454688","display_name":"Cost reduction","level":2,"score":0.4182840585708618},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.37775853276252747},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.33098840713500977},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.24404513835906982},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.08027383685112},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C187736073","wikidata":"https://www.wikidata.org/wiki/Q2920921","display_name":"Management","level":1,"score":0.0},{"id":"https://openalex.org/C51234621","wikidata":"https://www.wikidata.org/wiki/Q2149495","display_name":"Testability","level":2,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/date.2008.4484685","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2008.4484685","pdf_url":null,"source":{"id":"https://openalex.org/S4363607582","display_name":"2008 Design, Automation and Test in Europe","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 Design, Automation and Test in Europe","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1724489111","https://openalex.org/W1924406256","https://openalex.org/W2054971791","https://openalex.org/W2065937580","https://openalex.org/W2105725326","https://openalex.org/W2152293791","https://openalex.org/W2169517241","https://openalex.org/W3140757238","https://openalex.org/W7029018936"],"related_works":["https://openalex.org/W4285708951","https://openalex.org/W2147986372","https://openalex.org/W2786111245","https://openalex.org/W1863819993","https://openalex.org/W2154529098","https://openalex.org/W1627397376","https://openalex.org/W2144004661","https://openalex.org/W2137475190","https://openalex.org/W2061326683","https://openalex.org/W2129020400"],"abstract_inverted_index":{"Low-cost":[0],"test":[1,19,30,38,56,76,85,114,120,133,171,185],"methodologies":[2],"for":[3,73,79,95,202],"systems-on-chip":[4],"are":[5,61,157,188],"increasingly":[6],"popular.":[7],"They":[8],"dictate":[9],"which":[10,18,98,159],"features":[11,50],"have":[12,21],"to":[13,22,27,53,64,110,169,198],"be":[14,23,41],"included":[15],"on-chip":[16],"and":[17,139,177,182],"procedures":[20],"adopted":[24],"in":[25],"order":[26],"guarantee":[28],"high":[29],"quality,":[31],"while":[32],"minimizing":[33,118],"application":[34,81,164],"costs.":[35],"Consequently,":[36],"low-cost":[37,66,84],"strategies":[39],"can":[40],"run":[42],"on":[43,132],"testers":[44],"offering":[45],"lower":[46],"performance":[47],"and/or":[48],"reduced":[49],"with":[51],"respect":[52],"traditional":[54],"automatic":[55],"equipments":[57,60],"(ATEs);":[58],"these":[59],"usually":[62],"referred":[63],"as":[65,148],"testers.":[67],"This":[68],"paper":[69],"proposes":[70],"a":[71,90,100],"methodology":[72,168],"reducing":[74],"the":[75,80,103,111,119,125,163,166,170,200,203],"data":[77,121,161],"volume":[78],"of":[82,105,113,165,172],"SoC":[83],"procedures.":[86],"The":[87,128,190],"method":[88,130],"exploits":[89],"tester":[91,126],"architecture":[92],"organization":[93],"suitable":[94],"SoCs":[96,173],"testing,":[97],"includes":[99],"programmable":[101],"device:":[102],"usage":[104],"this":[106],"configurable":[107],"block":[108],"joined":[109],"analysis":[112],"pattern":[115,134,146,192],"regularities":[116],"permits":[117],"volume,":[122],"thus":[123],"improving":[124],"capabilities.":[127],"proposed":[129,167],"relies":[131],"compression":[135],"at":[136],"system":[137],"level":[138,145],"it":[140],"does":[141],"not":[142],"address":[143],"core":[144],"manipulation,":[147],"several":[149],"other":[150],"previously":[151],"published":[152],"works":[153],"do.":[154],"Case":[155],"studies":[156],"proposed,":[158],"provide":[160],"about":[162,199],"including":[174],"self-testable":[175],"processor":[176],"memory":[178],"cores.":[179],"IEEE":[180,183],"1149.1":[181],"1500":[184],"access":[186],"mechanisms":[187],"considered.":[189],"achieved":[191],"depth":[193],"reduction":[194],"ratio":[195],"is":[196],"up":[197],"64%":[201],"considered":[204],"case":[205],"studies.":[206]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}