{"id":"https://openalex.org/W2098235044","doi":"https://doi.org/10.1109/date.2006.243814","title":"ASIP Architecture for Multi-Standard Wireless Terminals","display_name":"ASIP Architecture for Multi-Standard Wireless Terminals","publication_year":2006,"publication_date":"2006-01-01","ids":{"openalex":"https://openalex.org/W2098235044","doi":"https://doi.org/10.1109/date.2006.243814","mag":"2098235044"},"language":"en","primary_location":{"id":"doi:10.1109/date.2006.243814","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2006.243814","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the Design Automation & Test in Europe Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5048863098","display_name":"Daniele Lo Iacono","orcid":null},"institutions":[{"id":"https://openalex.org/I131827901","display_name":"STMicroelectronics (Switzerland)","ror":"https://ror.org/00wm3b005","country_code":"CH","type":"company","lineage":["https://openalex.org/I131827901"]}],"countries":["CH"],"is_corresponding":true,"raw_author_name":"D. Lo Iacono","raw_affiliation_strings":["Advanced System Technology, STMicroelectronics, Inc., Canada","Advanced System Technology STMicroelectronics"],"affiliations":[{"raw_affiliation_string":"Advanced System Technology, STMicroelectronics, Inc., Canada","institution_ids":[]},{"raw_affiliation_string":"Advanced System Technology STMicroelectronics","institution_ids":["https://openalex.org/I131827901"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5028066945","display_name":"J. Zory","orcid":null},"institutions":[{"id":"https://openalex.org/I131827901","display_name":"STMicroelectronics (Switzerland)","ror":"https://ror.org/00wm3b005","country_code":"CH","type":"company","lineage":["https://openalex.org/I131827901"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"J. Zory","raw_affiliation_strings":["Advanced System Technology, STMicroelectronics, Inc., Canada","Advanced System Technology STMicroelectronics"],"affiliations":[{"raw_affiliation_string":"Advanced System Technology, STMicroelectronics, Inc., Canada","institution_ids":[]},{"raw_affiliation_string":"Advanced System Technology STMicroelectronics","institution_ids":["https://openalex.org/I131827901"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5019522836","display_name":"Ettore Messina","orcid":null},"institutions":[{"id":"https://openalex.org/I131827901","display_name":"STMicroelectronics (Switzerland)","ror":"https://ror.org/00wm3b005","country_code":"CH","type":"company","lineage":["https://openalex.org/I131827901"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"E. Messina","raw_affiliation_strings":["Advanced System Technology, STMicroelectronics, Inc., Canada","Advanced System Technology STMicroelectronics"],"affiliations":[{"raw_affiliation_string":"Advanced System Technology, STMicroelectronics, Inc., Canada","institution_ids":[]},{"raw_affiliation_string":"Advanced System Technology STMicroelectronics","institution_ids":["https://openalex.org/I131827901"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5083382108","display_name":"Nicol\u00f2 Ivan Piazzese","orcid":null},"institutions":[{"id":"https://openalex.org/I131827901","display_name":"STMicroelectronics (Switzerland)","ror":"https://ror.org/00wm3b005","country_code":"CH","type":"company","lineage":["https://openalex.org/I131827901"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"N. Piazzese","raw_affiliation_strings":["Advanced System Technology, STMicroelectronics, Inc., Canada","Advanced System Technology STMicroelectronics"],"affiliations":[{"raw_affiliation_string":"Advanced System Technology, STMicroelectronics, Inc., Canada","institution_ids":[]},{"raw_affiliation_string":"Advanced System Technology STMicroelectronics","institution_ids":["https://openalex.org/I131827901"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5072037374","display_name":"G. Saia","orcid":null},"institutions":[{"id":"https://openalex.org/I131827901","display_name":"STMicroelectronics (Switzerland)","ror":"https://ror.org/00wm3b005","country_code":"CH","type":"company","lineage":["https://openalex.org/I131827901"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"G. Saia","raw_affiliation_strings":["Advanced System Technology, STMicroelectronics, Inc., Canada","Advanced System Technology STMicroelectronics"],"affiliations":[{"raw_affiliation_string":"Advanced System Technology, STMicroelectronics, Inc., Canada","institution_ids":[]},{"raw_affiliation_string":"Advanced System Technology STMicroelectronics","institution_ids":["https://openalex.org/I131827901"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5078011000","display_name":"Andrea Bettinelli","orcid":"https://orcid.org/0000-0002-0025-1032"},"institutions":[{"id":"https://openalex.org/I131827901","display_name":"STMicroelectronics (Switzerland)","ror":"https://ror.org/00wm3b005","country_code":"CH","type":"company","lineage":["https://openalex.org/I131827901"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"A. Bettinelli","raw_affiliation_strings":["Advanced System Technology, STMicroelectronics, Inc., Canada","Advanced System Technology STMicroelectronics"],"affiliations":[{"raw_affiliation_string":"Advanced System Technology, STMicroelectronics, Inc., Canada","institution_ids":[]},{"raw_affiliation_string":"Advanced System Technology STMicroelectronics","institution_ids":["https://openalex.org/I131827901"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5048863098"],"corresponding_institution_ids":["https://openalex.org/I131827901"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.14750584,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"2","issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10125","display_name":"Advanced Wireless Communication Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10125","display_name":"Advanced Wireless Communication Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10575","display_name":"Wireless Communication Networks Research","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11321","display_name":"Error Correcting Code Techniques","score":0.9965999722480774,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7534493207931519},{"id":"https://openalex.org/keywords/pipeline","display_name":"Pipeline (software)","score":0.6739333271980286},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6458710432052612},{"id":"https://openalex.org/keywords/wireless","display_name":"Wireless","score":0.6278879046440125},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6011093258857727},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.57976895570755},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.5751219987869263},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.557159960269928},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.4740864038467407},{"id":"https://openalex.org/keywords/very-long-instruction-word","display_name":"Very long instruction word","score":0.4673882722854614},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.4498327672481537},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.44163089990615845},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3034525513648987},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.173611581325531},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.12499731779098511},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.0997554361820221},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.09021681547164917}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7534493207931519},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.6739333271980286},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6458710432052612},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.6278879046440125},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6011093258857727},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.57976895570755},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.5751219987869263},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.557159960269928},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.4740864038467407},{"id":"https://openalex.org/C170595534","wikidata":"https://www.wikidata.org/wiki/Q249743","display_name":"Very long instruction word","level":2,"score":0.4673882722854614},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.4498327672481537},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.44163089990615845},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3034525513648987},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.173611581325531},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.12499731779098511},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0997554361820221},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.09021681547164917},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/date.2006.243814","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2006.243814","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the Design Automation & Test in Europe Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.5600000023841858,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1646455256","https://openalex.org/W1903433235","https://openalex.org/W2095630695","https://openalex.org/W2098167103","https://openalex.org/W2130097991","https://openalex.org/W2155006335","https://openalex.org/W2163982637","https://openalex.org/W6636834494","https://openalex.org/W6639760383"],"related_works":["https://openalex.org/W2158867373","https://openalex.org/W3131666633","https://openalex.org/W1896855786","https://openalex.org/W2161750270","https://openalex.org/W2018918827","https://openalex.org/W2091059919","https://openalex.org/W1588619283","https://openalex.org/W1897551170","https://openalex.org/W2164026451","https://openalex.org/W2562747857"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"the":[3,17,37,55,57,61,67,71,83,87],"Block":[4],"Processing":[5],"Engine":[6],"(BPE),":[7],"an":[8],"Application":[9],"Specific":[10],"Instruction-Set":[11],"Processor":[12],"(ASIP)":[13],"explicitly":[14],"designed":[15],"for":[16,60],"implementation":[18],"of":[19,29,35,75],"multi":[20],"standard":[21],"wireless":[22],"terminals.":[23],"Thanks":[24],"to":[25],"a":[26,32,76],"high":[27],"level":[28],"parallelism":[30],"and":[31,66,86],"consistent":[33],"use":[34],"pipeline,":[36],"BPE":[38],"architecture":[39],"fully":[40],"satisfies":[41],"stringent":[42],"real-time":[43],"constraints":[44],"imposed":[45],"by":[46],"emerging":[47],"technologies.":[48],"Its":[49],"efficiency":[50],"has":[51],"been":[52],"proven":[53],"through":[54],"implementation,":[56],"physical":[58],"synthesis":[59],"CMOS":[62],"90nm":[63],"STM":[64],"technology":[65],"FPGA":[68],"prototyping":[69],"on":[70],"ARM":[72],"Versatile":[73],"platform":[74],"dual-standard":[77],"Frequency":[78],"Domain":[79],"Equalizer":[80],"(FDE)":[81],"supporting":[82],"3GPP":[84],"HSDPA":[85],"IEEE":[88],"802.11a":[89],"standards.":[90]},"counts_by_year":[{"year":2015,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}