{"id":"https://openalex.org/W2095646370","doi":"https://doi.org/10.1109/date.2006.243763","title":"DATE 2006 Special Session: DFM/DFY Design for Manufacturability and Yield - influence of process variations in digital, analog and mixed-signal circuit design","display_name":"DATE 2006 Special Session: DFM/DFY Design for Manufacturability and Yield - influence of process variations in digital, analog and mixed-signal circuit design","publication_year":2006,"publication_date":"2006-01-01","ids":{"openalex":"https://openalex.org/W2095646370","doi":"https://doi.org/10.1109/date.2006.243763","mag":"2095646370"},"language":"en","primary_location":{"id":"doi:10.1109/date.2006.243763","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2006.243763","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the Design Automation & Test in Europe Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5040151658","display_name":"Andreas Ripp","orcid":null},"institutions":[{"id":"https://openalex.org/I4210116354","display_name":"MunEDA (Germany)","ror":"https://ror.org/027pe7w88","country_code":"DE","type":"company","lineage":["https://openalex.org/I4210116354"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"A. Ripp","raw_affiliation_strings":["MunEDA GmbH, Munich, Germany","MunEDA GmbH, Munich, Germany\u2013andreas. ripp@muneda.com"],"affiliations":[{"raw_affiliation_string":"MunEDA GmbH, Munich, Germany","institution_ids":["https://openalex.org/I4210116354"]},{"raw_affiliation_string":"MunEDA GmbH, Munich, Germany\u2013andreas. ripp@muneda.com","institution_ids":["https://openalex.org/I4210116354"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109224870","display_name":"M. B\u00fchler","orcid":null},"institutions":[{"id":"https://openalex.org/I4210095996","display_name":"IBM (Germany)","ror":"https://ror.org/00pm7rm97","country_code":"DE","type":"company","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210095996"]},{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]}],"countries":["DE","US"],"is_corresponding":false,"raw_author_name":"M. Buhler","raw_affiliation_strings":["IBM Deutschland Entwicklung GmbH, B\u00f6blingen, Germany","IBM Deutschland Entwicklung, B\u00f6blingen#TAB#"],"affiliations":[{"raw_affiliation_string":"IBM Deutschland Entwicklung GmbH, B\u00f6blingen, Germany","institution_ids":["https://openalex.org/I4210095996"]},{"raw_affiliation_string":"IBM Deutschland Entwicklung, B\u00f6blingen#TAB#","institution_ids":["https://openalex.org/I1341412227"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110266665","display_name":"J. Koehl","orcid":null},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"J. Koehl","raw_affiliation_strings":["IBM Inc., Burlington, USA","IBM Deutschland Entwicklung, B\u00f6blingen#TAB#"],"affiliations":[{"raw_affiliation_string":"IBM Inc., Burlington, USA","institution_ids":["https://openalex.org/I1341412227"]},{"raw_affiliation_string":"IBM Deutschland Entwicklung, B\u00f6blingen#TAB#","institution_ids":["https://openalex.org/I1341412227"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5072794841","display_name":"Jeanne Paulette Bickford","orcid":"https://orcid.org/0000-0002-9547-0069"},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"J. Bickford","raw_affiliation_strings":["IBM Inc., Burlington, USA","[IBM Inc., Burlington, USA]"],"affiliations":[{"raw_affiliation_string":"IBM Inc., Burlington, USA","institution_ids":["https://openalex.org/I1341412227"]},{"raw_affiliation_string":"[IBM Inc., Burlington, USA]","institution_ids":["https://openalex.org/I1341412227"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5011534733","display_name":"Jason Hibbeler","orcid":null},"institutions":[{"id":"https://openalex.org/I62916508","display_name":"Technical University of Munich","ror":"https://ror.org/02kkvpp62","country_code":"DE","type":"education","lineage":["https://openalex.org/I62916508"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"J. Hibbeler","raw_affiliation_strings":["Technische Universit\u00e4t M\u00fcnchen, Germany","Technische Universitat, Munchen, Germany#TAB#"],"affiliations":[{"raw_affiliation_string":"Technische Universit\u00e4t M\u00fcnchen, Germany","institution_ids":["https://openalex.org/I62916508"]},{"raw_affiliation_string":"Technische Universitat, Munchen, Germany#TAB#","institution_ids":["https://openalex.org/I62916508"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5017567485","display_name":"Ulf Schlichtmann","orcid":"https://orcid.org/0000-0003-4431-7619"},"institutions":[{"id":"https://openalex.org/I62916508","display_name":"Technical University of Munich","ror":"https://ror.org/02kkvpp62","country_code":"DE","type":"education","lineage":["https://openalex.org/I62916508"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"U. Schlichtmann","raw_affiliation_strings":["Technische Universit\u00e4t M\u00fcnchen, Germany","Technische Universitat, Munchen, Germany#TAB#"],"affiliations":[{"raw_affiliation_string":"Technische Universit\u00e4t M\u00fcnchen, Germany","institution_ids":["https://openalex.org/I62916508"]},{"raw_affiliation_string":"Technische Universitat, Munchen, Germany#TAB#","institution_ids":["https://openalex.org/I62916508"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5063936941","display_name":"Ralf Sommer","orcid":null},"institutions":[{"id":"https://openalex.org/I137594350","display_name":"Infineon Technologies (Germany)","ror":"https://ror.org/005kw6t15","country_code":"DE","type":"company","lineage":["https://openalex.org/I137594350"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"R. Sommer","raw_affiliation_strings":["Infineon Technologies AG, Munich, Germany"],"affiliations":[{"raw_affiliation_string":"Infineon Technologies AG, Munich, Germany","institution_ids":["https://openalex.org/I137594350"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5049637242","display_name":"Michael Pronath","orcid":null},"institutions":[{"id":"https://openalex.org/I137594350","display_name":"Infineon Technologies (Germany)","ror":"https://ror.org/005kw6t15","country_code":"DE","type":"company","lineage":["https://openalex.org/I137594350"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"M. Pronath","raw_affiliation_strings":["Infineon Technologies AG, Munich, Germany"],"affiliations":[{"raw_affiliation_string":"Infineon Technologies AG, Munich, Germany","institution_ids":["https://openalex.org/I137594350"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":8,"corresponding_author_ids":["https://openalex.org/A5040151658"],"corresponding_institution_ids":["https://openalex.org/I4210116354"],"apc_list":null,"apc_paid":null,"fwci":0.8362,"has_fulltext":false,"cited_by_count":26,"citation_normalized_percentile":{"value":0.72333439,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11338","display_name":"Advancements in Photolithography Techniques","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/design-for-manufacturability","display_name":"Design for manufacturability","score":0.9461679458618164},{"id":"https://openalex.org/keywords/process-variation","display_name":"Process variation","score":0.6372042894363403},{"id":"https://openalex.org/keywords/mixed-signal-integrated-circuit","display_name":"Mixed-signal integrated circuit","score":0.6249102354049683},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.5955097675323486},{"id":"https://openalex.org/keywords/robustness","display_name":"Robustness (evolution)","score":0.5815567374229431},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.5124014019966125},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.49363720417022705},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4827525019645691},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.47995617985725403},{"id":"https://openalex.org/keywords/physical-design","display_name":"Physical design","score":0.46935778856277466},{"id":"https://openalex.org/keywords/parametric-statistics","display_name":"Parametric statistics","score":0.46513810753822327},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.44384101033210754},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.374600350856781},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.35259920358657837},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.22290444374084473},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.09141850471496582}],"concepts":[{"id":"https://openalex.org/C62064638","wikidata":"https://www.wikidata.org/wiki/Q553878","display_name":"Design for manufacturability","level":2,"score":0.9461679458618164},{"id":"https://openalex.org/C93389723","wikidata":"https://www.wikidata.org/wiki/Q7247313","display_name":"Process variation","level":3,"score":0.6372042894363403},{"id":"https://openalex.org/C62907940","wikidata":"https://www.wikidata.org/wiki/Q1541329","display_name":"Mixed-signal integrated circuit","level":3,"score":0.6249102354049683},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.5955097675323486},{"id":"https://openalex.org/C63479239","wikidata":"https://www.wikidata.org/wiki/Q7353546","display_name":"Robustness (evolution)","level":3,"score":0.5815567374229431},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.5124014019966125},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.49363720417022705},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4827525019645691},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.47995617985725403},{"id":"https://openalex.org/C188817802","wikidata":"https://www.wikidata.org/wiki/Q13426855","display_name":"Physical design","level":3,"score":0.46935778856277466},{"id":"https://openalex.org/C117251300","wikidata":"https://www.wikidata.org/wiki/Q1849855","display_name":"Parametric statistics","level":2,"score":0.46513810753822327},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.44384101033210754},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.374600350856781},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.35259920358657837},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.22290444374084473},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.09141850471496582},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0},{"id":"https://openalex.org/C55493867","wikidata":"https://www.wikidata.org/wiki/Q7094","display_name":"Biochemistry","level":1,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C104317684","wikidata":"https://www.wikidata.org/wiki/Q7187","display_name":"Gene","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/date.2006.243763","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2006.243763","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the Design Automation & Test in Europe Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W1508076293","https://openalex.org/W1535812334","https://openalex.org/W1573321145","https://openalex.org/W1874235218","https://openalex.org/W1877384195","https://openalex.org/W2048801731","https://openalex.org/W2087773252","https://openalex.org/W2096240822","https://openalex.org/W2096808535","https://openalex.org/W2101813923","https://openalex.org/W2112662324","https://openalex.org/W2116235542","https://openalex.org/W2120116751","https://openalex.org/W2126226073","https://openalex.org/W2126589469","https://openalex.org/W2157210245","https://openalex.org/W2163262735","https://openalex.org/W2165740397","https://openalex.org/W2168150082"],"related_works":["https://openalex.org/W4251264894","https://openalex.org/W3192656014","https://openalex.org/W2095646370","https://openalex.org/W1985797976","https://openalex.org/W1569991298","https://openalex.org/W2540146427","https://openalex.org/W2388589331","https://openalex.org/W2549099758","https://openalex.org/W624406738","https://openalex.org/W4321510758"],"abstract_inverted_index":{"The":[0,259],"concepts":[1],"of":[2,43,82,91,117,132,148,177,188,220,248,261,394],"design":[3,7,24,34,56,218,247,339],"for":[4,8,61,100,216,232,244,274,279,322,330],"manufacturability":[5],"and":[6,25,35,57,65,80,85,143,168,181,223,236,238,264,288,297,315,373,390],"yield":[9,81,123,167,234,262,265],"DFM/DFY":[10,213],"are":[11,112,229,336,360],"bringing":[12],"together":[13,193],"domains":[14],"that":[15,155,382],"co-existed":[16],"mostly":[17,113],"separated":[18],"until":[19],"now":[20],"$circuit":[21],"design,":[22],"physical":[23],"manufacturing":[26,182,190],"process.":[27,135],"New":[28,226],"requirements":[29],"like":[30,354],"SoC,":[31],"mixed":[32],"analog/digital":[33],"deep-submicron":[36,52],"technologies":[37,53,105,138],"force":[38],"to":[39,55,140,164,185,196,209,256,268,293,299,338,348,369],"a":[40,75,115,211,283,367],"mutual":[41],"integration":[42],"all":[44],"levels.":[45],"A":[46],"major":[47],"challenge":[48],"coming":[49,230],"with":[50,342],"new":[51],"is":[54,97,125,153,161,202,282,290,380],"verify":[58],"integrated":[59],"circuits":[60],"high":[62,186,334,343],"yield.":[63],"Random":[64],"systematic":[66],"defects":[67],"as":[68,70,276,278],"well":[69,277],"parametric":[71,233],"process":[72,92,159,392],"variations":[73,111,147],"have":[74,210,239],"large":[76],"influence":[77],"on":[78,252,304],"quality":[79],"the":[83,94,133,157,178,194,198,217,245,300,305,323,327,364,395],"designed":[84],"manufactured":[86],"circuits.":[87,225],"With":[88],"further":[89],"shrinking":[90,137],"technology,":[93],"on-chip":[95,146],"variation":[96,393],"getting":[98],"worse":[99],"each":[101],"technology":[102,158],"node.":[103],"For":[104,346,363],"larger":[106],"than":[107,150],"180nm":[108],"feature":[109],"sizes,":[110],"in":[114],"range":[116,124],"below":[118,144],"10%.":[119],"Here":[120],"an":[121],"acceptable":[122],"achieved":[126],"by":[127,388],"regular":[128],"but":[129],"error-prone":[130],"re-shifts":[131],"drifting":[134],"However,":[136],"down":[139],"90nm,":[141],"65nm":[142],"cause":[145],"more":[149],"50%.":[151],"It":[152],"understandable":[154],"tuning":[156],"alone":[160],"not":[162,298],"enough":[163],"guarantee":[165],"sufficient":[166],"robustness":[169,344],"levels":[170,271,351],"any":[171],"more.":[172],"Redesigns":[173],"and,":[174],"therefore,":[175],"respins":[176],"whole":[179],"development":[180],"chain":[183],"lead":[184],"costs":[187],"multiple":[189],"runs.":[191],"All":[192],"risk":[195],"miss":[197],"given":[199],"market":[200],"window":[201],"extremely":[203],"high.":[204],"Thus,":[205],"it":[206],"becomes":[207],"inevitable":[208],"seamless":[212],"concept":[214],"realized":[215],"phase":[219],"digital,":[221],"analog,":[222],"mixed-signal":[224],"DFY":[227],"methodologies":[228,379],"up":[231,255],"analysis":[235,263,287,358],"optimization":[237,266,289],"recently":[240],"been":[241],"made":[242],"available":[243],"industrial":[246],"individual":[249,294,340,396],"analog":[250,280,331,365],"blocks":[251,296,341],"transistor":[253],"level":[254],"1500":[257],"transistors.":[258],"transfer":[260],"techniques":[267],"other":[269,328],"abstraction":[270,347],"-":[272,281,312,321],"both":[273],"digital":[275,324,350],"big":[284],"challenge.":[285],"Yield":[286],"currently":[291],"applied":[292],"circuit":[295],"overall":[301],"chip":[302,318],"yielding":[303],"one":[306],"hand":[307,329],"often":[308,332],"too":[309],"pessimistic":[310],"results":[311],"best/worst":[313],"case":[314],"OCV":[316],"(on":[317],"variation)":[319],"factor":[320],"parts.":[325],"On":[326],"very":[333],"efforts":[335],"spent":[337],"(>6sigma).":[345],"higher":[349],"first":[352],"approaches":[353],"statistical":[355,385],"static":[356],"timing":[357],"(SSTA)":[359],"under":[361],"development.":[362],"parts":[366],"strategy":[368],"develop":[370],"macro":[371],"models":[372],"hierarchical":[374],"simulation":[375,378],"or":[376],"behavioral":[377],"required":[381],"includes":[383],"low-level":[384],"effects":[386],"caused":[387],"local":[389],"global":[391],"devices":[397]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":2},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":3},{"year":2013,"cited_by_count":3},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}