{"id":"https://openalex.org/W4253000137","doi":"https://doi.org/10.1109/date.2004.1269227","title":"A design methodology for the exploitation of high level communication synthesis","display_name":"A design methodology for the exploitation of high level communication synthesis","publication_year":2004,"publication_date":"2004-07-20","ids":{"openalex":"https://openalex.org/W4253000137","doi":"https://doi.org/10.1109/date.2004.1269227"},"language":"en","primary_location":{"id":"doi:10.1109/date.2004.1269227","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2004.1269227","pdf_url":null,"source":{"id":"https://openalex.org/S4363608792","display_name":"Proceedings Design, Automation and Test in Europe Conference and Exhibition","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings Design, Automation and Test in Europe Conference and Exhibition","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5058243151","display_name":"F. Bruschi","orcid":null},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":true,"raw_author_name":"F. Bruschi","raw_affiliation_strings":["Politecnico di Milano, Italy"],"affiliations":[{"raw_affiliation_string":"Politecnico di Milano, Italy","institution_ids":["https://openalex.org/I93860229"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5076541792","display_name":"M. Bombana","orcid":null},"institutions":[{"id":"https://openalex.org/I4210140880","display_name":"Cefriel","ror":"https://ror.org/046bfkz44","country_code":"IT","type":"nonprofit","lineage":["https://openalex.org/I4210140880"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"M. Bombana","raw_affiliation_strings":["CEFRIEL, Italy"],"affiliations":[{"raw_affiliation_string":"CEFRIEL, Italy","institution_ids":["https://openalex.org/I4210140880"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5058243151"],"corresponding_institution_ids":["https://openalex.org/I93860229"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.36240091,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"180","last_page":"185"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8660786151885986},{"id":"https://openalex.org/keywords/systemc","display_name":"SystemC","score":0.8081515431404114},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.6980721950531006},{"id":"https://openalex.org/keywords/interfacing","display_name":"Interfacing","score":0.630284309387207},{"id":"https://openalex.org/keywords/abstraction","display_name":"Abstraction","score":0.5147569179534912},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.5010442733764648},{"id":"https://openalex.org/keywords/context","display_name":"Context (archaeology)","score":0.49640923738479614},{"id":"https://openalex.org/keywords/design-methods","display_name":"Design methods","score":0.42463821172714233},{"id":"https://openalex.org/keywords/interface","display_name":"Interface (matter)","score":0.41032034158706665},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.40282106399536133},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3494514226913452},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.16888558864593506},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.11714321374893188}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8660786151885986},{"id":"https://openalex.org/C2776928060","wikidata":"https://www.wikidata.org/wiki/Q1753563","display_name":"SystemC","level":2,"score":0.8081515431404114},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.6980721950531006},{"id":"https://openalex.org/C2776303644","wikidata":"https://www.wikidata.org/wiki/Q1020499","display_name":"Interfacing","level":2,"score":0.630284309387207},{"id":"https://openalex.org/C124304363","wikidata":"https://www.wikidata.org/wiki/Q673661","display_name":"Abstraction","level":2,"score":0.5147569179534912},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.5010442733764648},{"id":"https://openalex.org/C2779343474","wikidata":"https://www.wikidata.org/wiki/Q3109175","display_name":"Context (archaeology)","level":2,"score":0.49640923738479614},{"id":"https://openalex.org/C138852830","wikidata":"https://www.wikidata.org/wiki/Q2292993","display_name":"Design methods","level":2,"score":0.42463821172714233},{"id":"https://openalex.org/C113843644","wikidata":"https://www.wikidata.org/wiki/Q901882","display_name":"Interface (matter)","level":4,"score":0.41032034158706665},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.40282106399536133},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3494514226913452},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.16888558864593506},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.11714321374893188},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0},{"id":"https://openalex.org/C129307140","wikidata":"https://www.wikidata.org/wiki/Q6795880","display_name":"Maximum bubble pressure method","level":3,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C157915830","wikidata":"https://www.wikidata.org/wiki/Q2928001","display_name":"Bubble","level":2,"score":0.0},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C187736073","wikidata":"https://www.wikidata.org/wiki/Q2920921","display_name":"Management","level":1,"score":0.0},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/date.2004.1269227","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2004.1269227","pdf_url":null,"source":{"id":"https://openalex.org/S4363608792","display_name":"Proceedings Design, Automation and Test in Europe Conference and Exhibition","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings Design, Automation and Test in Europe Conference and Exhibition","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":2,"referenced_works":["https://openalex.org/W154779625","https://openalex.org/W6606317389"],"related_works":["https://openalex.org/W2752828786","https://openalex.org/W2242433395","https://openalex.org/W2544073398","https://openalex.org/W2548514518","https://openalex.org/W1603163876","https://openalex.org/W2133642747","https://openalex.org/W2166219277","https://openalex.org/W4240280328","https://openalex.org/W47369351","https://openalex.org/W1490270176"],"abstract_inverted_index":{"In":[0,26,133,173,215],"this":[1,61,137],"paper":[2],"we":[3,139],"analyse":[4],"some":[5],"methodological":[6],"concerns":[7],"that":[8,143,151,204],"have":[9],"to":[10,31,68,84,135,147,175,183,211,217,236],"be":[11,82,103,145],"faced":[12],"in":[13,45,56,60,66,159],"a":[14,86,141,198,212],"design":[15,53,126,148,210],"flow":[16,54],"which":[17,46],"contains":[18],"automatic":[19,167],"synthesis":[20,33,168,227],"phases":[21],"from":[22,231],"high-level,":[23],"system":[24,39,233],"descriptions.":[25],"particular,":[27],"the":[28,32,35,38,47,52,57,75,91,109,113,117,121,125,160,163,170,185,188,191,195,207,219,222,232,237],"issues":[29],"related":[30],"of":[34,93,108,115,124,157,221,226,228],"communication":[36,161,186],"between":[37,187],"elements":[40,123],"are":[41,181],"considered.":[42],"The":[43],"context":[44],"analysis":[48],"is":[49,51,64,202,240],"performed":[50],"proposed":[55],"ODETTE":[58,110,171],"project:":[59],"ambient,":[62],"systemC":[63,77],"exploited":[65,182],"order":[67,134,174,216],"provide":[69],"efficient":[70],"system-level":[71],"models;":[72],"after":[73],"that,":[74,89],"systemC+":[76],"subset":[78],"and":[79,100,166,190],"extensions":[80],"can":[81,102,144],"used":[83,146],"get":[85],"refined":[87],"description":[88],"despite":[90],"use":[92],"object":[94],"oriented":[95],"features":[96],"such":[97],"as":[98],"polymorphism":[99],"inheritance,":[101],"automatically":[104],"synthesised":[105,119],"by":[106,169],"means":[107],"tools.":[111,172],"Still,":[112],"problem":[114],"interfacing":[116],"hardware":[118],"with":[120],"other":[122],"(memories,":[127],"peripherals)":[128],"remains":[129],"an":[130,154,224,229],"important":[131],"issue.":[132],"face":[136],"problem,":[138],"propose":[140],"pattern":[142],"bus":[149],"interfaces":[150],"allow":[152],"both":[153],"high":[155],"level":[156,234,239],"abstraction":[158],"on":[162],"\"user\"":[164],"side,":[165],"do":[176],"this,":[177],"OSSS":[178],"global":[179],"objects":[180],"implement":[184],"application":[189],"interface.":[192],"After":[193],"presenting":[194],"general":[196],"methodology,":[197],"specific":[199],"library":[200],"interface":[201],"presented,":[203],"could":[205],"connect":[206],"device":[208],"under":[209],"PCI":[213],"bus.":[214],"prove":[218],"viability":[220],"approach,":[223],"example":[225],"example,":[230],"down":[235],"RT":[238],"performed.":[241]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
