{"id":"https://openalex.org/W4240871715","doi":"https://doi.org/10.1109/date.2004.1269057","title":"ULSI interconnect length distribution model considering core utilization","display_name":"ULSI interconnect length distribution model considering core utilization","publication_year":2004,"publication_date":"2004-07-20","ids":{"openalex":"https://openalex.org/W4240871715","doi":"https://doi.org/10.1109/date.2004.1269057"},"language":"en","primary_location":{"id":"doi:10.1109/date.2004.1269057","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2004.1269057","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings Design, Automation and Test in Europe Conference and Exhibition","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5088450528","display_name":"H. Nakashima","orcid":null},"institutions":[{"id":"https://openalex.org/I114531698","display_name":"Tokyo Institute of Technology","ror":"https://ror.org/0112mx960","country_code":"JP","type":"education","lineage":["https://openalex.org/I114531698"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"H. Nakashima","raw_affiliation_strings":["Precision and Intelligence Laboratory, Tokyo Institute of Technology, Yokohama, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Precision and Intelligence Laboratory, Tokyo Institute of Technology, Yokohama, Japan","institution_ids":["https://openalex.org/I114531698"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5073626981","display_name":"J. Inoue","orcid":null},"institutions":[{"id":"https://openalex.org/I114531698","display_name":"Tokyo Institute of Technology","ror":"https://ror.org/0112mx960","country_code":"JP","type":"education","lineage":["https://openalex.org/I114531698"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"J. Inoue","raw_affiliation_strings":["Precision and Intelligence Laboratory, Tokyo Institute of Technology, Yokohama, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Precision and Intelligence Laboratory, Tokyo Institute of Technology, Yokohama, Japan","institution_ids":["https://openalex.org/I114531698"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5069154079","display_name":"K. Okada","orcid":null},"institutions":[{"id":"https://openalex.org/I114531698","display_name":"Tokyo Institute of Technology","ror":"https://ror.org/0112mx960","country_code":"JP","type":"education","lineage":["https://openalex.org/I114531698"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"K. Okada","raw_affiliation_strings":["Precision and Intelligence Laboratory, Tokyo Institute of Technology, Yokohama, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Precision and Intelligence Laboratory, Tokyo Institute of Technology, Yokohama, Japan","institution_ids":["https://openalex.org/I114531698"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5049015548","display_name":"Kazuya Masu","orcid":"https://orcid.org/0000-0002-7121-8440"},"institutions":[{"id":"https://openalex.org/I114531698","display_name":"Tokyo Institute of Technology","ror":"https://ror.org/0112mx960","country_code":"JP","type":"education","lineage":["https://openalex.org/I114531698"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"K. Masu","raw_affiliation_strings":["Precision and Intelligence Laboratory, Tokyo Institute of Technology, Yokohama, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Precision and Intelligence Laboratory, Tokyo Institute of Technology, Yokohama, Japan","institution_ids":["https://openalex.org/I114531698"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I114531698"],"apc_list":null,"apc_paid":null,"fwci":0.4137,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.65900626,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1210","last_page":"1215"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.8071958422660828},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.6056320667266846},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5853819251060486},{"id":"https://openalex.org/keywords/capacitance","display_name":"Capacitance","score":0.5666565299034119},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5217386484146118},{"id":"https://openalex.org/keywords/core","display_name":"Core (optical fiber)","score":0.47888463735580444},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.44167912006378174},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.23154059052467346},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2150162160396576},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.11826258897781372},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.07113730907440186}],"concepts":[{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.8071958422660828},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.6056320667266846},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5853819251060486},{"id":"https://openalex.org/C30066665","wikidata":"https://www.wikidata.org/wiki/Q164399","display_name":"Capacitance","level":3,"score":0.5666565299034119},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5217386484146118},{"id":"https://openalex.org/C2164484","wikidata":"https://www.wikidata.org/wiki/Q5170150","display_name":"Core (optical fiber)","level":2,"score":0.47888463735580444},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.44167912006378174},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.23154059052467346},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2150162160396576},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.11826258897781372},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.07113730907440186},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C17525397","wikidata":"https://www.wikidata.org/wiki/Q176140","display_name":"Electrode","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/date.2004.1269057","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2004.1269057","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings Design, Automation and Test in Europe Conference and Exhibition","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8899999856948853,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W1872673121","https://openalex.org/W1909710704","https://openalex.org/W2015540924","https://openalex.org/W2140523969","https://openalex.org/W2146306637","https://openalex.org/W2166695060","https://openalex.org/W2522991329","https://openalex.org/W7019244377"],"related_works":["https://openalex.org/W2155019192","https://openalex.org/W2014709025","https://openalex.org/W2347585086","https://openalex.org/W1527953837","https://openalex.org/W2042100038","https://openalex.org/W1991973217","https://openalex.org/W4242813950","https://openalex.org/W2084737927","https://openalex.org/W2157788653","https://openalex.org/W2018755015"],"abstract_inverted_index":{"Interconnect":[0],"length":[1,62,96],"distribution":[2],"(ILD)":[3],"represents":[4],"a":[5,42,47],"correlation":[6,48],"between":[7,49],"the":[8,78],"number":[9],"of":[10,60,85,93,99],"interconnects":[11],"and":[12,33,52,63,74],"length.":[13],"The":[14,55,102],"ILD":[15,43,104,108],"can":[16],"predict":[17,46],"power":[18],"consumption,":[19],"clock":[20],"frequency,":[21],"chip":[22,38,53,100],"size,":[23],"etc.":[24],"It":[25],"has":[26],"been":[27],"said":[28],"that":[29,92],"high":[30],"core":[31,50,70],"utilization":[32,51,71],"small":[34,73],"circuit":[35,67],"area":[36],"improve":[37,77],"performance.":[39,54,101],"We":[40],"propose":[41],"model":[44,57,105],"to":[45],"proposed":[56,103],"predicts":[58],"influences":[59],"interconnect":[61,64,95],"density":[65],"on":[66],"performances.":[68,79],"As":[69],"increases,":[72],"simple":[75],"circuits":[76],"In":[80],"large":[81],"complex":[82],"circuits,":[83],"decrease":[84],"load":[86],"capacitance":[87],"is":[88],"more":[89,109],"important":[90],"than":[91,111],"total":[94],"for":[97],"improvement":[98],"expresses":[106],"actual":[107],"accurate":[110],"conventional":[112],"models.":[113]},"counts_by_year":[{"year":2023,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
