{"id":"https://openalex.org/W4236133696","doi":"https://doi.org/10.1109/date.2004.1269036","title":"A modeling approach for addressing power supply switching noise related failures of integrated circuits","display_name":"A modeling approach for addressing power supply switching noise related failures of integrated circuits","publication_year":2004,"publication_date":"2004-07-20","ids":{"openalex":"https://openalex.org/W4236133696","doi":"https://doi.org/10.1109/date.2004.1269036"},"language":"en","primary_location":{"id":"doi:10.1109/date.2004.1269036","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2004.1269036","pdf_url":null,"source":{"id":"https://openalex.org/S4363608792","display_name":"Proceedings Design, Automation and Test in Europe Conference and Exhibition","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings Design, Automation and Test in Europe Conference and Exhibition","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5111879846","display_name":"C. Tirumurti","orcid":null},"institutions":[{"id":"https://openalex.org/I3131198051","display_name":"CollegeAmerica","ror":"https://ror.org/050p5ky47","country_code":"US","type":"education","lineage":["https://openalex.org/I3131198051"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"C. Tirumurti","raw_affiliation_strings":["CA, USA"],"affiliations":[{"raw_affiliation_string":"CA, USA","institution_ids":["https://openalex.org/I3131198051"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5054064879","display_name":"Sandip Kundu","orcid":"https://orcid.org/0000-0001-8221-3824"},"institutions":[{"id":"https://openalex.org/I3131198051","display_name":"CollegeAmerica","ror":"https://ror.org/050p5ky47","country_code":"US","type":"education","lineage":["https://openalex.org/I3131198051"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S. Kundu","raw_affiliation_strings":["CA, USA"],"affiliations":[{"raw_affiliation_string":"CA, USA","institution_ids":["https://openalex.org/I3131198051"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5021904459","display_name":"Susmita Sur\u2010Kolay","orcid":"https://orcid.org/0000-0002-2052-3779"},"institutions":[{"id":"https://openalex.org/I6498739","display_name":"Indian Statistical Institute","ror":"https://ror.org/00q2w1j53","country_code":"IN","type":"education","lineage":["https://openalex.org/I6498739"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"S. Sur-Kolay","raw_affiliation_strings":["Indian Statistical Institute, India"],"affiliations":[{"raw_affiliation_string":"Indian Statistical Institute, India","institution_ids":["https://openalex.org/I6498739"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5079591307","display_name":"Yi-Shing Chang","orcid":"https://orcid.org/0000-0002-9747-2586"},"institutions":[{"id":"https://openalex.org/I3131198051","display_name":"CollegeAmerica","ror":"https://ror.org/050p5ky47","country_code":"US","type":"education","lineage":["https://openalex.org/I3131198051"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yi-Shing Chang","raw_affiliation_strings":["CA, USA"],"affiliations":[{"raw_affiliation_string":"CA, USA","institution_ids":["https://openalex.org/I3131198051"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5111879846"],"corresponding_institution_ids":["https://openalex.org/I3131198051"],"apc_list":null,"apc_paid":null,"fwci":2.7999,"has_fulltext":false,"cited_by_count":52,"citation_normalized_percentile":{"value":0.89241223,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"1078","last_page":"1083"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6137794852256775},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.57705157995224},{"id":"https://openalex.org/keywords/power-network-design","display_name":"Power network design","score":0.5234610438346863},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.5006585121154785},{"id":"https://openalex.org/keywords/fault","display_name":"Fault (geology)","score":0.4840382933616638},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4182214140892029},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3930182456970215},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.37844476103782654},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.3469947576522827},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.34141093492507935},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.25545287132263184}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6137794852256775},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.57705157995224},{"id":"https://openalex.org/C164565468","wikidata":"https://www.wikidata.org/wiki/Q7236535","display_name":"Power network design","level":3,"score":0.5234610438346863},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.5006585121154785},{"id":"https://openalex.org/C175551986","wikidata":"https://www.wikidata.org/wiki/Q47089","display_name":"Fault (geology)","level":2,"score":0.4840382933616638},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4182214140892029},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3930182456970215},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.37844476103782654},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.3469947576522827},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.34141093492507935},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.25545287132263184},{"id":"https://openalex.org/C127313418","wikidata":"https://www.wikidata.org/wiki/Q1069","display_name":"Geology","level":0,"score":0.0},{"id":"https://openalex.org/C165205528","wikidata":"https://www.wikidata.org/wiki/Q83371","display_name":"Seismology","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/date.2004.1269036","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2004.1269036","pdf_url":null,"source":{"id":"https://openalex.org/S4363608792","display_name":"Proceedings Design, Automation and Test in Europe Conference and Exhibition","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings Design, Automation and Test in Europe Conference and Exhibition","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8600000143051147}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":2,"referenced_works":["https://openalex.org/W2087237681","https://openalex.org/W2109791184"],"related_works":["https://openalex.org/W39373273","https://openalex.org/W2098026815","https://openalex.org/W2390545901","https://openalex.org/W2351709090","https://openalex.org/W2735012529","https://openalex.org/W2732121450","https://openalex.org/W1619273082","https://openalex.org/W1604566864","https://openalex.org/W4234690636","https://openalex.org/W1513638945"],"abstract_inverted_index":{"Power":[0],"density":[1],"of":[2,22,37,41,105,113],"high-end":[3],"microprocessors":[4],"has":[5],"been":[6],"increasing":[7],"by":[8,19],"approximately":[9],"80%":[10],"per":[11,31],"technology":[12],"generation,":[13],"while":[14],"the":[15,43,79,83,103],"voltage":[16],"is":[17,127],"scaling":[18],"a":[20,61,98,123],"factor":[21],"0.8.":[23],"This":[24,50],"leads":[25,51],"to":[26,52,101,122],"225%":[27],"increase":[28],"in":[29,34,54],"current":[30],"unit":[32],"area":[33],"successive":[35],"generation":[36,107],"technologies.":[38],"The":[39],"cost":[40],"maintaining":[42],"same":[44],"IR":[45],"drop":[46],"becomes":[47,60],"too":[48],"high.":[49],"compromise":[53],"power":[55,58,84,91,114],"delivery":[56,115],"and":[57,71,96],"grid":[59,92],"performance":[62,65,94],"limiter.":[63],"Traditional":[64],"related":[66],"test":[67],"techniques":[68],"with":[69],"transition":[70],"path":[72],"delay":[73,109],"fault":[74,99,118],"models":[75],"focus":[76],"on":[77],"testing":[78],"logic":[80],"but":[81],"not":[82],"delivery.":[85],"In":[86],"this":[87],"paper":[88],"we":[89],"view":[90],"as":[93],"limiter":[95],"develop":[97],"model":[100],"address":[102],"problem":[104],"vector":[106],"for":[108],"faults":[110],"arising":[111],"out":[112],"problems.":[116],"A":[117],"extraction":[119],"methodology":[120],"applied":[121],"microprocessor":[124],"design":[125],"block":[126],"explained.":[128]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2013,"cited_by_count":7},{"year":2012,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
