{"id":"https://openalex.org/W4252879211","doi":"https://doi.org/10.1109/date.2004.1268966","title":"Analyzing on-chip communication in a MPSoC environment","display_name":"Analyzing on-chip communication in a MPSoC environment","publication_year":2004,"publication_date":"2004-07-20","ids":{"openalex":"https://openalex.org/W4252879211","doi":"https://doi.org/10.1109/date.2004.1268966"},"language":"en","primary_location":{"id":"doi:10.1109/date.2004.1268966","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2004.1268966","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings Design, Automation and Test in Europe Conference and Exhibition","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5043364325","display_name":"Mirko Loghi","orcid":"https://orcid.org/0000-0001-7876-3612"},"institutions":[{"id":"https://openalex.org/I119439378","display_name":"University of Verona","ror":"https://ror.org/039bp8j42","country_code":"IT","type":"education","lineage":["https://openalex.org/I119439378"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"M. Loghi","raw_affiliation_strings":["Dipartimento di Informatica, University of Verona, Verona, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dipartimento di Informatica, University of Verona, Verona, Italy","institution_ids":["https://openalex.org/I119439378"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5091526399","display_name":"Federico Angiolini","orcid":null},"institutions":[{"id":"https://openalex.org/I9360294","display_name":"University of Bologna","ror":"https://ror.org/01111rn36","country_code":"IT","type":"education","lineage":["https://openalex.org/I9360294"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"F. Angiolini","raw_affiliation_strings":["Dipartimento di Elettronica, Informatica e Sistemistica (DEIS), University of Bologna, Bologna, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dipartimento di Elettronica, Informatica e Sistemistica (DEIS), University of Bologna, Bologna, Italy","institution_ids":["https://openalex.org/I9360294"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5011268330","display_name":"Davide Bertozzi","orcid":"https://orcid.org/0000-0001-7462-4551"},"institutions":[{"id":"https://openalex.org/I9360294","display_name":"University of Bologna","ror":"https://ror.org/01111rn36","country_code":"IT","type":"education","lineage":["https://openalex.org/I9360294"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"D. Bertozzi","raw_affiliation_strings":["Dipartimento di Elettronica, Informatica e Sistemistica (DEIS), University of Bologna, Bologna, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dipartimento di Elettronica, Informatica e Sistemistica (DEIS), University of Bologna, Bologna, Italy","institution_ids":["https://openalex.org/I9360294"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043408422","display_name":"Luca Benini","orcid":"https://orcid.org/0000-0001-8068-3806"},"institutions":[{"id":"https://openalex.org/I9360294","display_name":"University of Bologna","ror":"https://ror.org/01111rn36","country_code":"IT","type":"education","lineage":["https://openalex.org/I9360294"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"L. Benini","raw_affiliation_strings":["Dipartimento di Elettronica, Informatica e Sistemistica (DEIS), University of Bologna, Bologna, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dipartimento di Elettronica, Informatica e Sistemistica (DEIS), University of Bologna, Bologna, Italy","institution_ids":["https://openalex.org/I9360294"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5024188590","display_name":"R. Zafalon","orcid":null},"institutions":[{"id":"https://openalex.org/I4210154781","display_name":"STMicroelectronics (Italy)","ror":"https://ror.org/053bqv655","country_code":"IT","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210154781"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"R. Zafalon","raw_affiliation_strings":["Advanced System Technology-Research & Innovation, STMicroelectronics, Agrate-Brianza, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Advanced System Technology-Research & Innovation, STMicroelectronics, Agrate-Brianza, Italy","institution_ids":["https://openalex.org/I4210154781"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":7.8805,"has_fulltext":false,"cited_by_count":80,"citation_normalized_percentile":{"value":0.98038297,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"752","last_page":"757"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9926000237464905,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/mpsoc","display_name":"MPSoC","score":0.9499216675758362},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5762082934379578},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.574537456035614},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.5555376410484314},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4629431962966919},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.14895474910736084}],"concepts":[{"id":"https://openalex.org/C2777187653","wikidata":"https://www.wikidata.org/wiki/Q975106","display_name":"MPSoC","level":3,"score":0.9499216675758362},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5762082934379578},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.574537456035614},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.5555376410484314},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4629431962966919},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.14895474910736084}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/date.2004.1268966","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2004.1268966","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings Design, Automation and Test in Europe Conference and Exhibition","raw_type":"proceedings-article"},{"id":"pmh:oai:iris.unife.it:11392/1192668","is_oa":false,"landing_page_url":"http://hdl.handle.net/11392/1192668","pdf_url":null,"source":{"id":"https://openalex.org/S4306400369","display_name":"Institutional Research Information System University of Ferrara (University of Ferrara)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I201324441","host_organization_name":"University of Ferrara","host_organization_lineage":["https://openalex.org/I201324441"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Climate action","id":"https://metadata.un.org/sdg/13","score":0.4699999988079071}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W1514972944","https://openalex.org/W1590349625","https://openalex.org/W1781660856","https://openalex.org/W1918487774","https://openalex.org/W2116493640","https://openalex.org/W2137185684","https://openalex.org/W2147291108","https://openalex.org/W2160642395","https://openalex.org/W2161452437","https://openalex.org/W4229644455","https://openalex.org/W4232824613","https://openalex.org/W4238141821","https://openalex.org/W4248688512","https://openalex.org/W4251038723","https://openalex.org/W6635079554","https://openalex.org/W6640092377","https://openalex.org/W6683617666"],"related_works":["https://openalex.org/W2502691491","https://openalex.org/W1976012348","https://openalex.org/W1973218087","https://openalex.org/W2262476182","https://openalex.org/W2110535659","https://openalex.org/W2154106283","https://openalex.org/W2098361120","https://openalex.org/W3198758847","https://openalex.org/W4230458348","https://openalex.org/W2371127580"],"abstract_inverted_index":{"This":[0,54],"work":[1],"focuses":[2],"on":[3,45,70,110],"communication":[4,35,60,92],"architecture":[5],"analysis":[6,88],"for":[7,59,64],"multi-processor":[8,21],"systems-on-chips":[9],"(MPSoCs),":[10],"and":[11,26,63,97],"it":[12],"leverages":[13],"a":[14,19,48,85],"SystemC-based":[15],"platform":[16],"to":[17,32],"simulate":[18],"complete":[20],"system":[22,71,99],"at":[23,73],"the":[24,34,57,65,74,103],"cycle-accurate":[25],"signal-accurate":[27],"level.":[28],"These":[29],"features":[30],"allow":[31],"stimulate":[33],"sub-system":[36],"with":[37],"functional":[38],"traffic":[39],"generated":[40],"by":[41],"real":[42],"applications":[43],"running":[44],"top":[46],"of":[47,51,67,77,84,105],"configurable":[49],"number":[50],"ARM":[52],"processors.":[53],"opens":[55],"up":[56],"possibility":[58],"infrastructure":[61],"exploration":[62],"investigation":[66],"its":[68],"impact":[69,104],"performance":[72,112],"highest":[75],"level":[76],"accuracy.":[78],"Our":[79],"simulation":[80],"environment":[81],"proved":[82],"capable":[83],"detailed":[86],"comparative":[87],"between":[89],"two":[90],"industry-standard":[91],"architectures,":[93],"under":[94],"realistic":[95],"workloads":[96],"different":[98],"configurations,":[100],"pointing":[101],"out":[102],"fine":[106],"grained":[107],"architectural":[108],"mismatches":[109],"macroscopic":[111],"differences.":[113]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":2}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}