{"id":"https://openalex.org/W4249323968","doi":"https://doi.org/10.1109/date.2004.1268926","title":"A methodology for system-level analog design space exploration","display_name":"A methodology for system-level analog design space exploration","publication_year":2004,"publication_date":"2004-06-21","ids":{"openalex":"https://openalex.org/W4249323968","doi":"https://doi.org/10.1109/date.2004.1268926"},"language":"en","primary_location":{"id":"doi:10.1109/date.2004.1268926","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2004.1268926","pdf_url":null,"source":{"id":"https://openalex.org/S4363608792","display_name":"Proceedings Design, Automation and Test in Europe Conference and Exhibition","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings Design, Automation and Test in Europe Conference and Exhibition","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5049806627","display_name":"F. De Bernardinis","orcid":null},"institutions":[{"id":"https://openalex.org/I108290504","display_name":"University of Pisa","ror":"https://ror.org/03ad39j10","country_code":"IT","type":"education","lineage":["https://openalex.org/I108290504"]},{"id":"https://openalex.org/I95457486","display_name":"University of California, Berkeley","ror":"https://ror.org/01an7q238","country_code":"US","type":"education","lineage":["https://openalex.org/I95457486"]}],"countries":["IT","US"],"is_corresponding":false,"raw_author_name":"F. De Bernardinis","raw_affiliation_strings":["Department of EECS, University of California, Berkeley, USA","Dipartimento di Ingegneria dellInformazione, Universit\u00e0 di Pisa, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of EECS, University of California, Berkeley, USA","institution_ids":["https://openalex.org/I95457486"]},{"raw_affiliation_string":"Dipartimento di Ingegneria dellInformazione, Universit\u00e0 di Pisa, Italy","institution_ids":["https://openalex.org/I108290504"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5088660554","display_name":"Alberto Sangiovanni\u2010Vincentelli","orcid":"https://orcid.org/0000-0003-1298-8389"},"institutions":[{"id":"https://openalex.org/I95457486","display_name":"University of California, Berkeley","ror":"https://ror.org/01an7q238","country_code":"US","type":"education","lineage":["https://openalex.org/I95457486"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"A. Sangiovanni Vincentelli","raw_affiliation_strings":["Department of EECS, University of California, Berkeley, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of EECS, University of California, Berkeley, USA","institution_ids":["https://openalex.org/I95457486"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":11,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"676","last_page":"677"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/space","display_name":"Space (punctuation)","score":0.602692723274231},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.597676694393158},{"id":"https://openalex.org/keywords/space-exploration","display_name":"Space exploration","score":0.5205941200256348},{"id":"https://openalex.org/keywords/design-space-exploration","display_name":"Design space exploration","score":0.47917261719703674},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2264137864112854},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.16117936372756958},{"id":"https://openalex.org/keywords/aerospace-engineering","display_name":"Aerospace engineering","score":0.11919578909873962},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.08404487371444702}],"concepts":[{"id":"https://openalex.org/C2778572836","wikidata":"https://www.wikidata.org/wiki/Q380933","display_name":"Space (punctuation)","level":2,"score":0.602692723274231},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.597676694393158},{"id":"https://openalex.org/C104060986","wikidata":"https://www.wikidata.org/wiki/Q180046","display_name":"Space exploration","level":2,"score":0.5205941200256348},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.47917261719703674},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2264137864112854},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.16117936372756958},{"id":"https://openalex.org/C146978453","wikidata":"https://www.wikidata.org/wiki/Q3798668","display_name":"Aerospace engineering","level":1,"score":0.11919578909873962},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.08404487371444702}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/date.2004.1268926","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2004.1268926","pdf_url":null,"source":{"id":"https://openalex.org/S4363608792","display_name":"Proceedings Design, Automation and Test in Europe Conference and Exhibition","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings Design, Automation and Test in Europe Conference and Exhibition","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W2096455207","https://openalex.org/W2103258167","https://openalex.org/W2103825248","https://openalex.org/W2108918590","https://openalex.org/W2137114625","https://openalex.org/W2143727503","https://openalex.org/W2145559872","https://openalex.org/W2152889194","https://openalex.org/W4232703903","https://openalex.org/W4237802631","https://openalex.org/W4242308495","https://openalex.org/W4251716291","https://openalex.org/W6681362172"],"related_works":["https://openalex.org/W2748952813","https://openalex.org/W2390279801","https://openalex.org/W2358668433","https://openalex.org/W2376932109","https://openalex.org/W2579738641","https://openalex.org/W4301487246","https://openalex.org/W3096664125","https://openalex.org/W2145929661","https://openalex.org/W2010254791","https://openalex.org/W185349370"],"abstract_inverted_index":{"This":[0],"paper":[1],"describes":[2],"a":[3,98],"novel":[4],"approach":[5,96],"to":[6,21],"system":[7],"level":[8,14,72],"analog":[9,30,33,60],"design.":[10],"A":[11],"new":[12],"abstraction":[13],"-":[15,18],"the":[16,65,92,95],"platform":[17,31],"is":[19,57,68,89],"introduced":[20],"separate":[22],"circuit":[23,51],"design":[24,26,54],"from":[25],"space":[27,56,67],"exploration.":[28],"An":[29],"encapsulates":[32],"components":[34],"concurrently":[35],"modeling":[36],"their":[37,40],"behavior":[38],"and":[39],"achievable":[41],"performances.":[42],"Performance":[43],"models":[44,81],"are":[45],"obtained":[46],"through":[47,77],"statistical":[48],"sampling":[49,66],"of":[50,94],"configurations.":[52],"The":[53],"configurations":[55],"specified":[58],"with":[59],"constraint":[61],"graphs":[62],"so":[63],"that":[64],"significantly":[69],"reduced.":[70],"System":[71],"exploration":[73],"can":[74],"be":[75],"achieved":[76],"optimization":[78],"on":[79,97],"behavioral":[80],"constrained":[82],"by":[83],"performance":[84],"models.":[85],"Finally,":[86],"an":[87],"example":[88],"provided":[90],"showing":[91],"effectiveness":[93],"WCDMA":[99],"amplifier.":[100]},"counts_by_year":[{"year":2013,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}