{"id":"https://openalex.org/W3138036865","doi":"https://doi.org/10.1109/date.2004.1268920","title":"Decomposition of instruction decoder for low power design","display_name":"Decomposition of instruction decoder for low power design","publication_year":2004,"publication_date":"2004-06-21","ids":{"openalex":"https://openalex.org/W3138036865","doi":"https://doi.org/10.1109/date.2004.1268920","mag":"3138036865"},"language":"en","primary_location":{"id":"doi:10.1109/date.2004.1268920","is_oa":false,"landing_page_url":"http://doi.org/10.1109/date.2004.1268920","pdf_url":null,"source":{"id":"https://openalex.org/S4363608792","display_name":"Proceedings Design, Automation and Test in Europe Conference and Exhibition","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings Design, Automation and Test in Europe Conference and Exhibition","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5103533514","display_name":"Wu-An Kuo","orcid":null},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Wu-An Kuo","raw_affiliation_strings":["Computer Science Department, Tsing Hua University, Hsin-Chu, Taiwan 30043"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Computer Science Department, Tsing Hua University, Hsin-Chu, Taiwan 30043","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043578401","display_name":"TingTing Hwang","orcid":"https://orcid.org/0000-0002-7206-560X"},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"TingTing Hwang","raw_affiliation_strings":["Computer Science Department, Tsing Hua University, Hsin-Chu, Taiwan 30043"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Computer Science Department, Tsing Hua University, Hsin-Chu, Taiwan 30043","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5056367344","display_name":"A.C.-H. Wu","orcid":"https://orcid.org/0000-0002-0825-1520"},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"A.C.-H. Wu","raw_affiliation_strings":["Computer Science Department, Tsing Hua University, Hsin-Chu, Taiwan 30043"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Computer Science Department, Tsing Hua University, Hsin-Chu, Taiwan 30043","institution_ids":["https://openalex.org/I25846049"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I25846049"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":"20","issue":null,"first_page":"664","last_page":"665"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.8907052278518677},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8192788362503052},{"id":"https://openalex.org/keywords/task","display_name":"Task (project management)","score":0.5352988839149475},{"id":"https://openalex.org/keywords/sequential-decoding","display_name":"Sequential decoding","score":0.5272780060768127},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5086239576339722},{"id":"https://openalex.org/keywords/decomposition","display_name":"Decomposition","score":0.4972863495349884},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4802727699279785},{"id":"https://openalex.org/keywords/control-unit","display_name":"Control unit","score":0.45253807306289673},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4478130638599396},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.4317507743835449},{"id":"https://openalex.org/keywords/minification","display_name":"Minification","score":0.4279812276363373},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.34314459562301636},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.27658042311668396},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.07742077112197876},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.06670618057250977}],"concepts":[{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.8907052278518677},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8192788362503052},{"id":"https://openalex.org/C2780451532","wikidata":"https://www.wikidata.org/wiki/Q759676","display_name":"Task (project management)","level":2,"score":0.5352988839149475},{"id":"https://openalex.org/C193969084","wikidata":"https://www.wikidata.org/wiki/Q7452500","display_name":"Sequential decoding","level":4,"score":0.5272780060768127},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5086239576339722},{"id":"https://openalex.org/C124681953","wikidata":"https://www.wikidata.org/wiki/Q339062","display_name":"Decomposition","level":2,"score":0.4972863495349884},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4802727699279785},{"id":"https://openalex.org/C81988521","wikidata":"https://www.wikidata.org/wiki/Q676838","display_name":"Control unit","level":2,"score":0.45253807306289673},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4478130638599396},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.4317507743835449},{"id":"https://openalex.org/C147764199","wikidata":"https://www.wikidata.org/wiki/Q6865248","display_name":"Minification","level":2,"score":0.4279812276363373},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.34314459562301636},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.27658042311668396},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.07742077112197876},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.06670618057250977},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.0},{"id":"https://openalex.org/C157125643","wikidata":"https://www.wikidata.org/wiki/Q884707","display_name":"Block code","level":3,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C18903297","wikidata":"https://www.wikidata.org/wiki/Q7150","display_name":"Ecology","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/date.2004.1268920","is_oa":false,"landing_page_url":"http://doi.org/10.1109/date.2004.1268920","pdf_url":null,"source":{"id":"https://openalex.org/S4363608792","display_name":"Proceedings Design, Automation and Test in Europe Conference and Exhibition","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings Design, Automation and Test in Europe Conference and Exhibition","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W2066906122","https://openalex.org/W2110211554","https://openalex.org/W2126940339","https://openalex.org/W2135640840","https://openalex.org/W2136244995","https://openalex.org/W4205649155","https://openalex.org/W4241357800"],"related_works":["https://openalex.org/W2365048703","https://openalex.org/W2029144766","https://openalex.org/W3017203753","https://openalex.org/W2348545647","https://openalex.org/W2385322349","https://openalex.org/W2357077655","https://openalex.org/W4205451769","https://openalex.org/W4289713215","https://openalex.org/W2089275957","https://openalex.org/W2052976169"],"abstract_inverted_index":{"Microprocessors":[0],"have":[1,77],"been":[2],"used":[3],"in":[4],"wide-ranged":[5],"applications.During":[6],"the":[7,38,49,57,94,98],"execution":[8,58],"of":[9,60,87],"instructions,":[10],"instruction":[11,95],"decoding":[12,64],"is":[13],"a":[14,31,44],"major":[15],"task":[16],"for":[17,24,35,93],"identifying":[18],"instructions":[19],"and":[20,89,97],"generating":[21],"control":[22,99],"signals":[23],"data-paths.By":[25],"exploiting":[26],"program":[27],"behaviors,":[28],"we":[29,42],"propose":[30],"novel":[32],"instruction-decoding":[33,40,50],"approach":[34,82],"power":[36,91],"minimization.Using":[37],"proposed":[39,63,81],"structure,":[41,65],"present":[43],"partitioning":[45],"method":[46],"that":[47,79],"decomposes":[48],"circuit":[51],"into":[52],"two":[53],"sub-circuits":[54],"according":[55],"to":[56],"frequencies":[59],"instructions.Using":[61],"our":[62,80],"only":[66],"one":[67],"sub-circuit":[68],"will":[69],"be":[70],"activated":[71],"when":[72],"executing":[73],"an":[74,85],"instruction.Experimental":[75],"results":[76],"demonstrated":[78],"achieves":[83],"on":[84],"average":[86],"26.71%":[88],"15.69%":[90],"reductions":[92],"decoder":[96],"unit,":[100],"respectively.":[101]},"counts_by_year":[],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}