{"id":"https://openalex.org/W4238879689","doi":"https://doi.org/10.1109/date.2004.1268871","title":"Microarchitecture development via metropolis successive platform refinement","display_name":"Microarchitecture development via metropolis successive platform refinement","publication_year":2004,"publication_date":"2004-06-21","ids":{"openalex":"https://openalex.org/W4238879689","doi":"https://doi.org/10.1109/date.2004.1268871"},"language":"en","primary_location":{"id":"doi:10.1109/date.2004.1268871","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2004.1268871","pdf_url":null,"source":{"id":"https://openalex.org/S4363608792","display_name":"Proceedings Design, Automation and Test in Europe Conference and Exhibition","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings Design, Automation and Test in Europe Conference and Exhibition","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5006554658","display_name":"Douglas Densmore","orcid":"https://orcid.org/0000-0002-7666-6808"},"institutions":[{"id":"https://openalex.org/I95457486","display_name":"University of California, Berkeley","ror":"https://ror.org/01an7q238","country_code":"US","type":"education","lineage":["https://openalex.org/I95457486"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"D. Densmore","raw_affiliation_strings":["University of California Berkeley, CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of California Berkeley, CA, USA","institution_ids":["https://openalex.org/I95457486"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5047534997","display_name":"S. Rekhi","orcid":null},"institutions":[{"id":"https://openalex.org/I4210127281","display_name":"Cypress Semiconductor Corporation (United States)","ror":"https://ror.org/02wpc5d77","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127281"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S. Rekhi","raw_affiliation_strings":["Cypress Semiconductors, Inc., CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Cypress Semiconductors, Inc., CA, USA","institution_ids":["https://openalex.org/I4210127281"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5088660554","display_name":"Alberto Sangiovanni\u2010Vincentelli","orcid":"https://orcid.org/0000-0003-1298-8389"},"institutions":[{"id":"https://openalex.org/I95457486","display_name":"University of California, Berkeley","ror":"https://ror.org/01an7q238","country_code":"US","type":"education","lineage":["https://openalex.org/I95457486"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"A. Sangiovanni-Vincentelli","raw_affiliation_strings":["University of California Berkeley, CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of California Berkeley, CA, USA","institution_ids":["https://openalex.org/I95457486"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.4158,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.78711485,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"134","issue":null,"first_page":"346","last_page":"351"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7866038084030151},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5878753662109375},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.4570174515247345},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.43610063195228577},{"id":"https://openalex.org/keywords/focus","display_name":"Focus (optics)","score":0.4358382225036621},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.4324221909046173},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.427334189414978},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.41896456480026245},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3898826837539673},{"id":"https://openalex.org/keywords/systems-engineering","display_name":"Systems engineering","score":0.36904168128967285},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.35883915424346924},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.10529223084449768},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.09822720289230347}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7866038084030151},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5878753662109375},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.4570174515247345},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.43610063195228577},{"id":"https://openalex.org/C192209626","wikidata":"https://www.wikidata.org/wiki/Q190909","display_name":"Focus (optics)","level":2,"score":0.4358382225036621},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.4324221909046173},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.427334189414978},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.41896456480026245},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3898826837539673},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.36904168128967285},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.35883915424346924},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.10529223084449768},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.09822720289230347},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C120665830","wikidata":"https://www.wikidata.org/wiki/Q14620","display_name":"Optics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/date.2004.1268871","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2004.1268871","pdf_url":null,"source":{"id":"https://openalex.org/S4363608792","display_name":"Proceedings Design, Automation and Test in Europe Conference and Exhibition","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings Design, Automation and Test in Europe Conference and Exhibition","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W1488659932","https://openalex.org/W2119355229","https://openalex.org/W2150408604","https://openalex.org/W2151415616"],"related_works":["https://openalex.org/W122453572","https://openalex.org/W2038503502","https://openalex.org/W2351011383","https://openalex.org/W2146879484","https://openalex.org/W4221002079","https://openalex.org/W2141090099","https://openalex.org/W2045325972","https://openalex.org/W1980898636","https://openalex.org/W3008777550","https://openalex.org/W1757458251"],"abstract_inverted_index":{"Productivity":[0],"data":[1],"for":[2,55],"IC":[3,132],"designs":[4],"indicates":[5],"an":[6],"exponential":[7],"increase":[8],"in":[9,24,60,75],"design":[10,51,62,72,135],"time":[11],"and":[12,68],"cost":[13],"with":[14,41],"the":[15,30,49,61,84,114,131],"number":[16],"of":[17,32,66,86,108,127],"elements":[18],"that":[19,111],"are":[20],"to":[21,35,46,53,89],"be":[22],"included":[23],"a":[25,90,105,124],"device.":[26],"Present":[27],"applications":[28],"require":[29],"development":[31],"complex":[33,91],"systems":[34],"support":[36],"novel":[37],"functionality.":[38],"To":[39],"cope":[40],"these":[42,80],"difficulties,":[43],"we":[44,102],"need":[45],"change":[47],"radically":[48],"present":[50,83],"methodology":[52,88,110],"allow":[54],"extensive":[56],"re-use,":[57],"early":[58],"verification":[59,115],"cycle,":[63],"pervasive":[64],"use":[65],"software,":[67],"architecture-level":[69],"optimization.":[70],"Platform-based":[71],"as":[73],"defined":[74],"A.":[76],"Sangiovanni-Vincentelli":[77],"(2002),":[78],"has":[79],"characteristics.":[81],"We":[82,119],"application":[85,93],"this":[87,99,109,121],"industrial":[92],"provided":[94],"by":[95],"Cypress":[96],"Semiconductor.":[97],"In":[98],"case":[100],"study,":[101],"focus":[103],"on":[104],"particular":[106],"aspect":[107],"eases":[112],"considerably":[113],"process:":[116],"successive":[117],"refinement.":[118],"compare":[120],"approach":[122],"versus":[123],"parallel":[125],"team":[126],"designers":[128],"who":[129],"developed":[130],"using":[133],"standard":[134],"approaches.":[136]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}