{"id":"https://openalex.org/W4231072903","doi":"https://doi.org/10.1109/date.2004.1268866","title":"Power aware variable partitioning and instruction scheduling for multiple memory banks","display_name":"Power aware variable partitioning and instruction scheduling for multiple memory banks","publication_year":2004,"publication_date":"2004-06-21","ids":{"openalex":"https://openalex.org/W4231072903","doi":"https://doi.org/10.1109/date.2004.1268866"},"language":"en","primary_location":{"id":"doi:10.1109/date.2004.1268866","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2004.1268866","pdf_url":null,"source":{"id":"https://openalex.org/S4363608792","display_name":"Proceedings Design, Automation and Test in Europe Conference and Exhibition","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings Design, Automation and Test in Europe Conference and Exhibition","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100781872","display_name":"Zhong Wang","orcid":"https://orcid.org/0000-0002-6307-0458"},"institutions":[{"id":"https://openalex.org/I107639228","display_name":"University of Notre Dame","ror":"https://ror.org/00mkhxb43","country_code":"US","type":"education","lineage":["https://openalex.org/I107639228"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Zhong Wang","raw_affiliation_strings":["Department of Computer Science & Engineering, University of Notre Dame, Notre Dame, IN, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science & Engineering, University of Notre Dame, Notre Dame, IN, USA","institution_ids":["https://openalex.org/I107639228"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100600905","display_name":"Xiaobo Sharon Hu","orcid":"https://orcid.org/0000-0002-6636-9738"},"institutions":[{"id":"https://openalex.org/I107639228","display_name":"University of Notre Dame","ror":"https://ror.org/00mkhxb43","country_code":"US","type":"education","lineage":["https://openalex.org/I107639228"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Xiaobo Sharon Hu","raw_affiliation_strings":["Department of Computer Science & Engineering, University of Notre Dame, Notre Dame, IN, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science & Engineering, University of Notre Dame, Notre Dame, IN, USA","institution_ids":["https://openalex.org/I107639228"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I107639228"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"312","last_page":"317"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9929999709129333,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9929999709129333,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9878000020980835,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.987500011920929,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8457579016685486},{"id":"https://openalex.org/keywords/partition","display_name":"Partition (number theory)","score":0.6599166393280029},{"id":"https://openalex.org/keywords/exploit","display_name":"Exploit","score":0.6593511700630188},{"id":"https://openalex.org/keywords/instruction-scheduling","display_name":"Instruction scheduling","score":0.6281092166900635},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.6076222658157349},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5793516039848328},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.5373470187187195},{"id":"https://openalex.org/keywords/variable","display_name":"Variable (mathematics)","score":0.4699072241783142},{"id":"https://openalex.org/keywords/register-allocation","display_name":"Register allocation","score":0.4420575499534607},{"id":"https://openalex.org/keywords/energy-consumption","display_name":"Energy consumption","score":0.4366161823272705},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3421914875507355},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.3357788920402527},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.2011100947856903},{"id":"https://openalex.org/keywords/dynamic-priority-scheduling","display_name":"Dynamic priority scheduling","score":0.19439736008644104},{"id":"https://openalex.org/keywords/two-level-scheduling","display_name":"Two-level scheduling","score":0.11451706290245056},{"id":"https://openalex.org/keywords/schedule","display_name":"Schedule","score":0.09962764382362366},{"id":"https://openalex.org/keywords/mathematical-optimization","display_name":"Mathematical optimization","score":0.09068956971168518}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8457579016685486},{"id":"https://openalex.org/C42812","wikidata":"https://www.wikidata.org/wiki/Q1082910","display_name":"Partition (number theory)","level":2,"score":0.6599166393280029},{"id":"https://openalex.org/C165696696","wikidata":"https://www.wikidata.org/wiki/Q11287","display_name":"Exploit","level":2,"score":0.6593511700630188},{"id":"https://openalex.org/C73564150","wikidata":"https://www.wikidata.org/wiki/Q11417093","display_name":"Instruction scheduling","level":5,"score":0.6281092166900635},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.6076222658157349},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5793516039848328},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.5373470187187195},{"id":"https://openalex.org/C182365436","wikidata":"https://www.wikidata.org/wiki/Q50701","display_name":"Variable (mathematics)","level":2,"score":0.4699072241783142},{"id":"https://openalex.org/C128916667","wikidata":"https://www.wikidata.org/wiki/Q1343660","display_name":"Register allocation","level":3,"score":0.4420575499534607},{"id":"https://openalex.org/C2780165032","wikidata":"https://www.wikidata.org/wiki/Q16869822","display_name":"Energy consumption","level":2,"score":0.4366161823272705},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3421914875507355},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.3357788920402527},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.2011100947856903},{"id":"https://openalex.org/C107568181","wikidata":"https://www.wikidata.org/wiki/Q5319000","display_name":"Dynamic priority scheduling","level":3,"score":0.19439736008644104},{"id":"https://openalex.org/C119948110","wikidata":"https://www.wikidata.org/wiki/Q7858726","display_name":"Two-level scheduling","level":4,"score":0.11451706290245056},{"id":"https://openalex.org/C68387754","wikidata":"https://www.wikidata.org/wiki/Q7271585","display_name":"Schedule","level":2,"score":0.09962764382362366},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.09068956971168518},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C18903297","wikidata":"https://www.wikidata.org/wiki/Q7150","display_name":"Ecology","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/date.2004.1268866","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2004.1268866","pdf_url":null,"source":{"id":"https://openalex.org/S4363608792","display_name":"Proceedings Design, Automation and Test in Europe Conference and Exhibition","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings Design, Automation and Test in Europe Conference and Exhibition","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W40192171","https://openalex.org/W1851406565","https://openalex.org/W1985672179","https://openalex.org/W2017927472","https://openalex.org/W2105560756","https://openalex.org/W2105625331","https://openalex.org/W2122777354","https://openalex.org/W2135906862","https://openalex.org/W2151121248","https://openalex.org/W2486715098","https://openalex.org/W4230937113","https://openalex.org/W4240156662","https://openalex.org/W4250209592","https://openalex.org/W4251916958","https://openalex.org/W4254442528","https://openalex.org/W6658813008"],"related_works":["https://openalex.org/W2091058226","https://openalex.org/W1596795436","https://openalex.org/W2074352684","https://openalex.org/W4253173659","https://openalex.org/W2353958330","https://openalex.org/W2168354894","https://openalex.org/W4231369653","https://openalex.org/W2054996834","https://openalex.org/W182448324","https://openalex.org/W1572089978"],"abstract_inverted_index":{"Many":[0],"high-end":[1],"DSP":[2],"processors":[3],"employ":[4],"both":[5,66],"multiple":[6],"memory":[7],"banks":[8],"and":[9,16,41,68],"heterogeneous":[10],"register":[11],"files":[12],"to":[13,28,44,64,75],"improve":[14],"performance":[15,67,93],"power":[17,69],"consumption.":[18],"The":[19],"complexity":[20],"of":[21,100],"such":[22,51,81],"architectures":[23],"presents":[24],"a":[25,58],"great":[26],"challenge":[27],"compiler":[29],"design.":[30],"In":[31],"this":[32],"paper,":[33],"we":[34],"present":[35],"an":[36,73],"approach":[37,54],"for":[38],"variable":[39,79],"partitioning":[40],"instruction":[42],"scheduling":[43],"maximally":[45],"exploit":[46],"the":[47,78,83,91,98],"benefits":[48],"provided":[49],"by":[50],"architectures.":[52],"Our":[53],"is":[55,87],"built":[56],"on":[57],"novel":[59],"graph":[60],"model":[61],"which":[62],"strives":[63],"capture":[65],"demands.":[70],"We":[71],"propose":[72],"algorithm":[74],"iteratively":[76],"find":[77],"partition":[80],"that":[82],"maximum":[84],"energy":[85],"saving":[86],"achieved":[88],"while":[89],"satisfying":[90],"given":[92],"constraint.":[94],"Experimental":[95],"results":[96],"demonstrate":[97],"effectiveness":[99],"our":[101],"approach.":[102]},"counts_by_year":[{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}