{"id":"https://openalex.org/W1919483352","doi":"https://doi.org/10.1109/date.2003.1186394","title":"Generalized posynomial performance modeling [analog ICs]","display_name":"Generalized posynomial performance modeling [analog ICs]","publication_year":2003,"publication_date":"2003-12-22","ids":{"openalex":"https://openalex.org/W1919483352","doi":"https://doi.org/10.1109/date.2003.1186394","mag":"1919483352"},"language":"en","primary_location":{"id":"doi:10.1109/date.2003.1186394","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2003.1186394","pdf_url":null,"source":{"id":"https://openalex.org/S4363607952","display_name":"2003 Design, Automation and Test in Europe Conference and Exhibition","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2003 Design, Automation and Test in Europe Conference and Exhibition","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5046756864","display_name":"Tom Eeckelaert","orcid":null},"institutions":[{"id":"https://openalex.org/I99464096","display_name":"KU Leuven","ror":"https://ror.org/05f950310","country_code":"BE","type":"education","lineage":["https://openalex.org/I99464096"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"T. Eeckelaert","raw_affiliation_strings":["Department of Electrical Engineering, ESAT-MICAS, Katholieke Universiteit Leuven, Leuven, Belgium","Dept. of Electr. Eng., Katholieke Univ. Leuven, Belgium"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, ESAT-MICAS, Katholieke Universiteit Leuven, Leuven, Belgium","institution_ids":["https://openalex.org/I99464096"]},{"raw_affiliation_string":"Dept. of Electr. Eng., Katholieke Univ. Leuven, Belgium","institution_ids":["https://openalex.org/I99464096"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5010961502","display_name":"Walter Daems","orcid":"https://orcid.org/0000-0001-6717-744X"},"institutions":[{"id":"https://openalex.org/I17653759","display_name":"Fund for Scientific Research","ror":"https://ror.org/03q83t159","country_code":"BE","type":"nonprofit","lineage":["https://openalex.org/I17653759"]},{"id":"https://openalex.org/I99464096","display_name":"KU Leuven","ror":"https://ror.org/05f950310","country_code":"BE","type":"education","lineage":["https://openalex.org/I99464096"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"W. Daems","raw_affiliation_strings":["Fund for Scientific Research of Flanders, Flanders, Belgium","Dept. of Electr. Eng., Katholieke Univ. Leuven, Belgium"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Fund for Scientific Research of Flanders, Flanders, Belgium","institution_ids":["https://openalex.org/I17653759"]},{"raw_affiliation_string":"Dept. of Electr. Eng., Katholieke Univ. Leuven, Belgium","institution_ids":["https://openalex.org/I99464096"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5029270525","display_name":"Georges Gielen","orcid":"https://orcid.org/0000-0002-4061-9428"},"institutions":[{"id":"https://openalex.org/I99464096","display_name":"KU Leuven","ror":"https://ror.org/05f950310","country_code":"BE","type":"education","lineage":["https://openalex.org/I99464096"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"G. Gielen","raw_affiliation_strings":["Department of Electrical Engineering, ESAT-MICAS, Katholieke Universiteit Leuven, Leuven, Belgium","Dept. of Electr. Eng., Katholieke Univ. Leuven, Belgium"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, ESAT-MICAS, Katholieke Universiteit Leuven, Leuven, Belgium","institution_ids":["https://openalex.org/I99464096"]},{"raw_affiliation_string":"Dept. of Electr. Eng., Katholieke Univ. Leuven, Belgium","institution_ids":["https://openalex.org/I99464096"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5039390348","display_name":"Willy Sansen","orcid":"https://orcid.org/0000-0003-2098-3019"},"institutions":[{"id":"https://openalex.org/I99464096","display_name":"KU Leuven","ror":"https://ror.org/05f950310","country_code":"BE","type":"education","lineage":["https://openalex.org/I99464096"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"W. Sansen","raw_affiliation_strings":["Department of Electrical Engineering, ESAT-MICAS, Katholieke Universiteit Leuven, Leuven, Belgium","Dept. of Electr. Eng., Katholieke Univ. Leuven, Belgium"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, ESAT-MICAS, Katholieke Universiteit Leuven, Leuven, Belgium","institution_ids":["https://openalex.org/I99464096"]},{"raw_affiliation_string":"Dept. of Electr. Eng., Katholieke Univ. Leuven, Belgium","institution_ids":["https://openalex.org/I99464096"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"250","last_page":"255"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/sizing","display_name":"Sizing","score":0.6432971358299255},{"id":"https://openalex.org/keywords/spice","display_name":"Spice","score":0.6319035887718201},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.608780562877655},{"id":"https://openalex.org/keywords/maxima-and-minima","display_name":"Maxima and minima","score":0.6058140397071838},{"id":"https://openalex.org/keywords/analogue-electronics","display_name":"Analogue electronics","score":0.6001757383346558},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.5386540293693542},{"id":"https://openalex.org/keywords/nonlinear-system","display_name":"Nonlinear system","score":0.44981837272644043},{"id":"https://openalex.org/keywords/optimization-problem","display_name":"Optimization problem","score":0.42060425877571106},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.4136779308319092},{"id":"https://openalex.org/keywords/mathematical-optimization","display_name":"Mathematical optimization","score":0.3906749188899994},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.3560757040977478},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.25932085514068604},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.22019538283348083},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.17602992057800293}],"concepts":[{"id":"https://openalex.org/C2777767291","wikidata":"https://www.wikidata.org/wiki/Q1080291","display_name":"Sizing","level":2,"score":0.6432971358299255},{"id":"https://openalex.org/C2780077345","wikidata":"https://www.wikidata.org/wiki/Q16891888","display_name":"Spice","level":2,"score":0.6319035887718201},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.608780562877655},{"id":"https://openalex.org/C186633575","wikidata":"https://www.wikidata.org/wiki/Q845060","display_name":"Maxima and minima","level":2,"score":0.6058140397071838},{"id":"https://openalex.org/C29074008","wikidata":"https://www.wikidata.org/wiki/Q174925","display_name":"Analogue electronics","level":3,"score":0.6001757383346558},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.5386540293693542},{"id":"https://openalex.org/C158622935","wikidata":"https://www.wikidata.org/wiki/Q660848","display_name":"Nonlinear system","level":2,"score":0.44981837272644043},{"id":"https://openalex.org/C137836250","wikidata":"https://www.wikidata.org/wiki/Q984063","display_name":"Optimization problem","level":2,"score":0.42060425877571106},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.4136779308319092},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.3906749188899994},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.3560757040977478},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.25932085514068604},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.22019538283348083},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.17602992057800293},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/date.2003.1186394","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2003.1186394","pdf_url":null,"source":{"id":"https://openalex.org/S4363607952","display_name":"2003 Design, Automation and Test in Europe Conference and Exhibition","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2003 Design, Automation and Test in Europe Conference and Exhibition","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W1580199978","https://openalex.org/W1598638350","https://openalex.org/W2007449126","https://openalex.org/W2032834460","https://openalex.org/W2052900991","https://openalex.org/W2106476087","https://openalex.org/W2118158907","https://openalex.org/W2122919983","https://openalex.org/W2137534401","https://openalex.org/W2432517183","https://openalex.org/W3097169496","https://openalex.org/W4245827549","https://openalex.org/W4247282788","https://openalex.org/W4249150173"],"related_works":["https://openalex.org/W2375684291","https://openalex.org/W2204879205","https://openalex.org/W2375311683","https://openalex.org/W2366062860","https://openalex.org/W2373777250","https://openalex.org/W2353956655","https://openalex.org/W2020653254","https://openalex.org/W2010454064","https://openalex.org/W1943174035","https://openalex.org/W2352072014"],"abstract_inverted_index":{"This":[0,77],"paper":[1],"presents":[2],"a":[3,51,90],"new":[4],"method":[5,60],"to":[6,49],"automatically":[7],"generate":[8],"posynomial":[9,31,65],"symbolic":[10],"expressions":[11,67],"for":[12,68],"the":[13,26,30,80,96,105,116,121],"performance":[14,66],"characteristics":[15],"of":[16,29,63,83,108,120],"analog":[17,97],"integrated":[18],"circuits.":[19],"The":[20,58,101],"coefficient":[21],"set":[22,28],"as":[23,25],"well":[24],"exponent":[27],"expression":[32],"are":[33],"determined":[34],"based":[35],"on":[36],"SPICE":[37],"simulation":[38],"data":[39],"with":[40],"device-level":[41],"accuracy.":[42],"We":[43],"prove":[44],"that":[45,88,93],"this":[46],"problem":[47,54],"corresponds":[48],"solving":[50],"non-convex":[52],"optimization":[53],"without":[55],"local":[56],"minima.":[57],"presented":[59,122],"is":[61],"capable":[62],"generating":[64],"both":[69],"linear":[70],"and":[71,74,118],"nonlinear":[72],"circuits":[73],"circuit":[75,98],"characteristics.":[76],"approach":[78],"allows":[79],"automatic":[81,102],"generation":[82,103],"an":[84],"accurate":[85],"sizing":[86,99],"model":[87,111],"composes":[89],"geometric":[91],"program":[92],"fully":[94],"describes":[95],"problem.":[100],"avoids":[104],"time-consuming":[106],"nature":[107],"hand-crafted":[109],"analytic":[110],"generation.":[112],"Experimental":[113],"results":[114],"illustrate":[115],"capabilities":[117],"effectiveness":[119],"modeling":[123],"technique.":[124]},"counts_by_year":[{"year":2020,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}