{"id":"https://openalex.org/W2209880034","doi":"https://doi.org/10.1109/dasip.2015.7367243","title":"Exploring custom heterogeneous MPSoCs for real-time neural signal decoding","display_name":"Exploring custom heterogeneous MPSoCs for real-time neural signal decoding","publication_year":2015,"publication_date":"2015-09-01","ids":{"openalex":"https://openalex.org/W2209880034","doi":"https://doi.org/10.1109/dasip.2015.7367243","mag":"2209880034"},"language":"en","primary_location":{"id":"doi:10.1109/dasip.2015.7367243","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dasip.2015.7367243","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 Conference on Design and Architectures for Signal and Image Processing (DASIP)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5050421874","display_name":"Paolo Meloni","orcid":"https://orcid.org/0000-0002-8106-4641"},"institutions":[{"id":"https://openalex.org/I172446870","display_name":"University of Cagliari","ror":"https://ror.org/003109y17","country_code":"IT","type":"education","lineage":["https://openalex.org/I172446870"]}],"countries":["IT"],"is_corresponding":true,"raw_author_name":"Paolo Meloni","raw_affiliation_strings":["Dipartimento Ingegneria Elettrica ed Elettronica, Universit\u00e0 degli Studi di Cagliari, Cagliari, Italy"],"affiliations":[{"raw_affiliation_string":"Dipartimento Ingegneria Elettrica ed Elettronica, Universit\u00e0 degli Studi di Cagliari, Cagliari, Italy","institution_ids":["https://openalex.org/I172446870"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5034689390","display_name":"Giuseppe Tuveri","orcid":null},"institutions":[{"id":"https://openalex.org/I172446870","display_name":"University of Cagliari","ror":"https://ror.org/003109y17","country_code":"IT","type":"education","lineage":["https://openalex.org/I172446870"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Giuseppe Tuveri","raw_affiliation_strings":["Dipartimento Ingegneria Elettrica ed Elettronica, Universit\u00e0 degli Studi di Cagliari, Cagliari, Italy"],"affiliations":[{"raw_affiliation_string":"Dipartimento Ingegneria Elettrica ed Elettronica, Universit\u00e0 degli Studi di Cagliari, Cagliari, Italy","institution_ids":["https://openalex.org/I172446870"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5029192066","display_name":"Danilo Pani","orcid":"https://orcid.org/0000-0003-1924-0875"},"institutions":[{"id":"https://openalex.org/I172446870","display_name":"University of Cagliari","ror":"https://ror.org/003109y17","country_code":"IT","type":"education","lineage":["https://openalex.org/I172446870"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Danilo Pani","raw_affiliation_strings":["Dipartimento Ingegneria Elettrica ed Elettronica, Universit\u00e0 degli Studi di Cagliari, Cagliari, Italy"],"affiliations":[{"raw_affiliation_string":"Dipartimento Ingegneria Elettrica ed Elettronica, Universit\u00e0 degli Studi di Cagliari, Cagliari, Italy","institution_ids":["https://openalex.org/I172446870"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5007761671","display_name":"Luigi Raffo","orcid":"https://orcid.org/0000-0001-9683-009X"},"institutions":[{"id":"https://openalex.org/I172446870","display_name":"University of Cagliari","ror":"https://ror.org/003109y17","country_code":"IT","type":"education","lineage":["https://openalex.org/I172446870"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Luigi Raffo","raw_affiliation_strings":["Dipartimento Ingegneria Elettrica ed Elettronica, Universit\u00e0 degli Studi di Cagliari, Cagliari, Italy"],"affiliations":[{"raw_affiliation_string":"Dipartimento Ingegneria Elettrica ed Elettronica, Universit\u00e0 degli Studi di Cagliari, Cagliari, Italy","institution_ids":["https://openalex.org/I172446870"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5028624281","display_name":"Francesca Palumbo","orcid":"https://orcid.org/0000-0002-6155-1979"},"institutions":[{"id":"https://openalex.org/I159650629","display_name":"University of Sassari","ror":"https://ror.org/01bnjbv91","country_code":"IT","type":"education","lineage":["https://openalex.org/I159650629"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Francesca Palumbo","raw_affiliation_strings":["PolComIng - Gruppo Ingegneria dell'Informazione, Universit\u00e0 degli Studi di Sassari, Sassari, Italy"],"affiliations":[{"raw_affiliation_string":"PolComIng - Gruppo Ingegneria dell'Informazione, Universit\u00e0 degli Studi di Sassari, Sassari, Italy","institution_ids":["https://openalex.org/I159650629"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5050421874"],"corresponding_institution_ids":["https://openalex.org/I172446870"],"apc_list":null,"apc_paid":null,"fwci":0.2727,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.53319551,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":"4","issue":null,"first_page":"1","last_page":"8"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}},"topics":[{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9965999722480774,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9961000084877014,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/mpsoc","display_name":"MPSoC","score":0.9228746891021729},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7602331638336182},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7350380420684814},{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.681807279586792},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6134346723556519},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5117580890655518},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.5103155970573425},{"id":"https://openalex.org/keywords/design-space-exploration","display_name":"Design space exploration","score":0.4754588007926941},{"id":"https://openalex.org/keywords/signal-processing","display_name":"Signal processing","score":0.4433327913284302},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.43445777893066406},{"id":"https://openalex.org/keywords/neural-decoding","display_name":"Neural decoding","score":0.43246033787727356},{"id":"https://openalex.org/keywords/software-prototyping","display_name":"Software prototyping","score":0.4220902621746063},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.37920212745666504},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3605912923812866},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.22594189643859863},{"id":"https://openalex.org/keywords/software-development","display_name":"Software development","score":0.129268079996109}],"concepts":[{"id":"https://openalex.org/C2777187653","wikidata":"https://www.wikidata.org/wiki/Q975106","display_name":"MPSoC","level":3,"score":0.9228746891021729},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7602331638336182},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7350380420684814},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.681807279586792},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6134346723556519},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5117580890655518},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.5103155970573425},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.4754588007926941},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.4433327913284302},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.43445777893066406},{"id":"https://openalex.org/C40743351","wikidata":"https://www.wikidata.org/wiki/Q7002049","display_name":"Neural decoding","level":3,"score":0.43246033787727356},{"id":"https://openalex.org/C2776697782","wikidata":"https://www.wikidata.org/wiki/Q576460","display_name":"Software prototyping","level":4,"score":0.4220902621746063},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.37920212745666504},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3605912923812866},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.22594189643859863},{"id":"https://openalex.org/C529173508","wikidata":"https://www.wikidata.org/wiki/Q638608","display_name":"Software development","level":3,"score":0.129268079996109},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/dasip.2015.7367243","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dasip.2015.7367243","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 Conference on Design and Architectures for Signal and Image Processing (DASIP)","raw_type":"proceedings-article"},{"id":"pmh:oai:iris.unica.it:11584/137270","is_oa":false,"landing_page_url":"http://hdl.handle.net/11584/137270","pdf_url":null,"source":{"id":"https://openalex.org/S4377196293","display_name":"UNICA IRIS Institutional Research Information System (University of Cagliari)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I172446870","host_organization_name":"University of Cagliari","host_organization_lineage":["https://openalex.org/I172446870"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"info:eu-repo/semantics/conferencePaper"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":27,"referenced_works":["https://openalex.org/W29781625","https://openalex.org/W1522332593","https://openalex.org/W1597755753","https://openalex.org/W1965758091","https://openalex.org/W1983474846","https://openalex.org/W1998611303","https://openalex.org/W1999031782","https://openalex.org/W1999308080","https://openalex.org/W2034147791","https://openalex.org/W2046704078","https://openalex.org/W2054488209","https://openalex.org/W2076995679","https://openalex.org/W2103471094","https://openalex.org/W2119235711","https://openalex.org/W2124502724","https://openalex.org/W2138895011","https://openalex.org/W2139184079","https://openalex.org/W2148824675","https://openalex.org/W2157827577","https://openalex.org/W2161738264","https://openalex.org/W2165280873","https://openalex.org/W2169937988","https://openalex.org/W2171406132","https://openalex.org/W3152096162","https://openalex.org/W4239719188","https://openalex.org/W6601221807","https://openalex.org/W6635964534"],"related_works":["https://openalex.org/W2092181573","https://openalex.org/W2576551918","https://openalex.org/W2056447856","https://openalex.org/W2998838928","https://openalex.org/W2783693002","https://openalex.org/W4294611724","https://openalex.org/W3043614744","https://openalex.org/W2105957719","https://openalex.org/W1973069902","https://openalex.org/W2124403023"],"abstract_inverted_index":{"The":[0,87,119],"design":[1,70,89],"of":[2,19,59,94,115,139],"embedded":[3,78],"systems":[4],"for":[5,143],"neuroprosthetic":[6],"applications":[7],"represents":[8],"an":[9,49,81],"important":[10],"challenge":[11],"to":[12,32,39,123,129],"be":[13],"faced":[14],"in":[15,29,64],"electronic":[16],"bioengineering.":[17],"One":[18],"the":[20,26,34,57,61,110,116,137],"key":[21],"research":[22],"problems":[23],"is":[24,47],"decoding":[25,85],"information":[27],"encoded":[28],"neural":[30,83],"signals":[31],"extract":[33],"patient's":[35],"motion":[36],"intention.":[37],"How":[38],"implement":[40],"a":[41,69,133],"highly-portable":[42],"and":[43,112],"reliable":[44],"integrated":[45],"solution":[46],"still":[48],"open":[50],"issue.":[51],"In":[52],"this":[53,65],"paper,":[54],"we":[55],"investigate":[56],"possibility":[58],"adopting":[60],"MPSoC":[62,77],"paradigm":[63],"application":[66],"domain,":[67],"presenting":[68],"space":[71],"exploration":[72],"that":[73],"evaluates":[74],"different":[75,92],"custom":[76,140],"architectures,":[79],"implementing":[80],"on-line":[82],"signal":[84,147],"algorithm.":[86],"evaluated":[88],"points":[90],"feature":[91],"mappings":[93],"parallel":[95],"software":[96],"tasks":[97],"onto":[98],"customized":[99],"ASIP":[100],"processing":[101],"cores.":[102],"Experimental":[103],"results,":[104],"obtained":[105],"by":[106],"FPGA-based":[107],"prototyping,":[108],"assess":[109],"performance":[111],"hardware-related":[113],"costs":[114],"considered":[117],"configurations.":[118],"clock":[120],"frequency":[121],"needed":[122],"respect":[124],"real-time":[125],"constraints":[126],"was":[127],"reduced":[128],"22":[130],"MHz,":[131],"making":[132],"step":[134],"further":[135],"towards":[136],"exploitation":[138],"heterogeneous":[141],"MPSoCs":[142],"ultra-low":[144],"power":[145],"biomedical":[146],"processing.":[148]},"counts_by_year":[{"year":2019,"cited_by_count":1},{"year":2016,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
