{"id":"https://openalex.org/W2160956146","doi":"https://doi.org/10.1109/dasip.2010.5706250","title":"A hybrid dual-core Reconfigurable Processor for EBCOT tier-1 encoder in JPEG2000 on next generation of digital cameras","display_name":"A hybrid dual-core Reconfigurable Processor for EBCOT tier-1 encoder in JPEG2000 on next generation of digital cameras","publication_year":2010,"publication_date":"2010-10-01","ids":{"openalex":"https://openalex.org/W2160956146","doi":"https://doi.org/10.1109/dasip.2010.5706250","mag":"2160956146"},"language":"en","primary_location":{"id":"doi:10.1109/dasip.2010.5706250","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dasip.2010.5706250","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 Conference on Design and Architectures for Signal and Image Processing (DASIP)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5034073130","display_name":"Xin Zhao","orcid":"https://orcid.org/0000-0002-9088-3673"},"institutions":[{"id":"https://openalex.org/I98677209","display_name":"University of Edinburgh","ror":"https://ror.org/01nrxwf90","country_code":"GB","type":"education","lineage":["https://openalex.org/I98677209"]}],"countries":["GB"],"is_corresponding":true,"raw_author_name":"Xin Zhao","raw_affiliation_strings":["School of Engineering, University of Edinburgh, UK"],"affiliations":[{"raw_affiliation_string":"School of Engineering, University of Edinburgh, UK","institution_ids":["https://openalex.org/I98677209"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5001069449","display_name":"Ahmet T. Erdogan","orcid":"https://orcid.org/0000-0003-2451-9395"},"institutions":[{"id":"https://openalex.org/I98677209","display_name":"University of Edinburgh","ror":"https://ror.org/01nrxwf90","country_code":"GB","type":"education","lineage":["https://openalex.org/I98677209"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Ahmet T. Erdogan","raw_affiliation_strings":["School of Engineering, University of Edinburgh, UK"],"affiliations":[{"raw_affiliation_string":"School of Engineering, University of Edinburgh, UK","institution_ids":["https://openalex.org/I98677209"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5022272531","display_name":"Tughrul Arslan","orcid":"https://orcid.org/0000-0001-8176-5803"},"institutions":[{"id":"https://openalex.org/I98677209","display_name":"University of Edinburgh","ror":"https://ror.org/01nrxwf90","country_code":"GB","type":"education","lineage":["https://openalex.org/I98677209"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Tughrul Arslan","raw_affiliation_strings":["School of Engineering, University of Edinburgh, UK"],"affiliations":[{"raw_affiliation_string":"School of Engineering, University of Edinburgh, UK","institution_ids":["https://openalex.org/I98677209"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5034073130"],"corresponding_institution_ids":["https://openalex.org/I98677209"],"apc_list":null,"apc_paid":null,"fwci":0.3187,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.63608116,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"2","issue":null,"first_page":"84","last_page":"89"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10901","display_name":"Advanced Data Compression Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10901","display_name":"Advanced Data Compression Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10627","display_name":"Advanced Image and Video Retrieval Techniques","score":0.9955000281333923,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10741","display_name":"Video Coding and Compression Technologies","score":0.986299991607666,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8179324865341187},{"id":"https://openalex.org/keywords/encoder","display_name":"Encoder","score":0.698184609413147},{"id":"https://openalex.org/keywords/jpeg-2000","display_name":"JPEG 2000","score":0.6894940733909607},{"id":"https://openalex.org/keywords/very-long-instruction-word","display_name":"Very long instruction word","score":0.6890538930892944},{"id":"https://openalex.org/keywords/context","display_name":"Context (archaeology)","score":0.5442904829978943},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.5236539840698242},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.47372403740882874},{"id":"https://openalex.org/keywords/coprocessor","display_name":"Coprocessor","score":0.4657934904098511},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.45694929361343384},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.44863057136535645},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.44538113474845886},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.4198532998561859},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.41699928045272827},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.39196357131004333},{"id":"https://openalex.org/keywords/image-compression","display_name":"Image compression","score":0.22028511762619019},{"id":"https://openalex.org/keywords/image-processing","display_name":"Image processing","score":0.18269023299217224},{"id":"https://openalex.org/keywords/image","display_name":"Image (mathematics)","score":0.11585769057273865},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.10894650220870972}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8179324865341187},{"id":"https://openalex.org/C118505674","wikidata":"https://www.wikidata.org/wiki/Q42586063","display_name":"Encoder","level":2,"score":0.698184609413147},{"id":"https://openalex.org/C69216139","wikidata":"https://www.wikidata.org/wiki/Q931783","display_name":"JPEG 2000","level":5,"score":0.6894940733909607},{"id":"https://openalex.org/C170595534","wikidata":"https://www.wikidata.org/wiki/Q249743","display_name":"Very long instruction word","level":2,"score":0.6890538930892944},{"id":"https://openalex.org/C2779343474","wikidata":"https://www.wikidata.org/wiki/Q3109175","display_name":"Context (archaeology)","level":2,"score":0.5442904829978943},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5236539840698242},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.47372403740882874},{"id":"https://openalex.org/C86111242","wikidata":"https://www.wikidata.org/wiki/Q859595","display_name":"Coprocessor","level":2,"score":0.4657934904098511},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.45694929361343384},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.44863057136535645},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.44538113474845886},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.4198532998561859},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.41699928045272827},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.39196357131004333},{"id":"https://openalex.org/C13481523","wikidata":"https://www.wikidata.org/wiki/Q412438","display_name":"Image compression","level":4,"score":0.22028511762619019},{"id":"https://openalex.org/C9417928","wikidata":"https://www.wikidata.org/wiki/Q1070689","display_name":"Image processing","level":3,"score":0.18269023299217224},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.11585769057273865},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.10894650220870972},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/dasip.2010.5706250","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dasip.2010.5706250","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 Conference on Design and Architectures for Signal and Image Processing (DASIP)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.5400000214576721,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":27,"referenced_works":["https://openalex.org/W1479967673","https://openalex.org/W1592052747","https://openalex.org/W1943217694","https://openalex.org/W1977251687","https://openalex.org/W2024859298","https://openalex.org/W2043264416","https://openalex.org/W2066437933","https://openalex.org/W2093248760","https://openalex.org/W2097602901","https://openalex.org/W2103328948","https://openalex.org/W2111200065","https://openalex.org/W2114010667","https://openalex.org/W2117700758","https://openalex.org/W2130770975","https://openalex.org/W2132573196","https://openalex.org/W2138871304","https://openalex.org/W2138902454","https://openalex.org/W2146771309","https://openalex.org/W2156163958","https://openalex.org/W2161794409","https://openalex.org/W2170858985","https://openalex.org/W6635430381","https://openalex.org/W6676758203","https://openalex.org/W6680439080","https://openalex.org/W6681507385","https://openalex.org/W6684086261","https://openalex.org/W6684997158"],"related_works":["https://openalex.org/W1897551170","https://openalex.org/W4237406352","https://openalex.org/W2139795029","https://openalex.org/W2562747857","https://openalex.org/W1973931517","https://openalex.org/W2018918827","https://openalex.org/W1547865754","https://openalex.org/W2276000909","https://openalex.org/W2802197431","https://openalex.org/W2059109441"],"abstract_inverted_index":{"In":[0,153],"this":[1,155],"paper,":[2],"we":[3],"present":[4],"a":[5,12,18,91,136],"JPEG2000":[6,167],"EBCOT":[7,35],"tier-1":[8,36],"encoder":[9,37,168],"based":[10],"on":[11,169],"hybrid":[13,156],"dual-core":[14],"processor":[15,157],"composed":[16],"of":[17,31,54,174],"coarse-grained":[19],"Dynamically":[20],"Reconfigurable":[21],"Processor":[22],"(DRP)":[23],"and":[24,43,144],"an":[25],"ARM":[26],"core":[27],"targeting":[28,171],"next":[29,172],"generation":[30,173],"cameras.":[32],"The":[33,81],"complete":[34,166],"is":[38,68],"partitioned":[39],"into":[40],"two":[41,47,56,103,110],"tasks":[42,111],"mapped":[44],"onto":[45],"the":[46,55,64,98,102,106,109,116,126,165],"cores":[48],"respectively":[49],"according":[50],"to":[51,133],"different":[52],"potentials":[53],"processors.":[57],"A":[58],"Partial":[59],"Parallel":[60],"Architecture":[61],"(PPA)":[62],"for":[63,75,78,119,135,163],"Context":[65],"Modeling":[66],"(CM)":[67],"employed":[69],"which":[70],"can":[71,112],"be":[72,113],"easily":[73],"tailored":[74],"DRP":[76],"implementation":[77],"higher":[79],"performance.":[80,121],"Arithmetic":[82],"Encoder":[83],"(AE)":[84],"has":[85],"been":[86],"optimized":[87],"as":[88,97],"well,":[89],"with":[90,149],"shared":[92],"Dual-Port":[93],"RAM":[94],"(DPRAM)":[95],"acting":[96],"communication":[99],"intermediate":[100],"between":[101],"cores.":[104],"For":[105],"entire":[107],"application,":[108],"pipelined":[114],"via":[115],"global":[117],"DPRAM":[118],"better":[120],"Simulation":[122],"results":[123],"show":[124],"that":[125],"resulting":[127],"architecture":[128],"provides":[129],"throughput":[130],"reaching":[131],"up":[132],"40fps":[134],"256\u00d7256":[137],"8-bit":[138],"grayscale":[139],"standard":[140],"Lena":[141],"test":[142],"image":[143],"shows":[145,159],"its":[146,160],"advantage":[147],"compared":[148],"some":[150],"DSP&VLIW":[151],"applications.":[152,176],"addition,":[154],"also":[158],"high":[161],"potential":[162],"implementing":[164],"it":[170],"camera":[175]},"counts_by_year":[{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
