{"id":"https://openalex.org/W4414197065","doi":"https://doi.org/10.1109/dac63849.2025.11133189","title":"Decoupling Analog Circuit Representation from Technology for Behavior-Centric Optimization","display_name":"Decoupling Analog Circuit Representation from Technology for Behavior-Centric Optimization","publication_year":2025,"publication_date":"2025-06-22","ids":{"openalex":"https://openalex.org/W4414197065","doi":"https://doi.org/10.1109/dac63849.2025.11133189"},"language":"en","primary_location":{"id":"doi:10.1109/dac63849.2025.11133189","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dac63849.2025.11133189","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 62nd ACM/IEEE Design Automation Conference (DAC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100334715","display_name":"Jintao Li","orcid":"https://orcid.org/0000-0003-0403-6767"},"institutions":[{"id":"https://openalex.org/I4210145761","display_name":"Shenzhen Institutes of Advanced Technology","ror":"https://ror.org/04gh4er46","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210145761"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Jintao Li","raw_affiliation_strings":["Shenzhen Institute for Advanced Study University of Electronic Science and Technology of China,Shenzhen,China,518110"],"affiliations":[{"raw_affiliation_string":"Shenzhen Institute for Advanced Study University of Electronic Science and Technology of China,Shenzhen,China,518110","institution_ids":["https://openalex.org/I4210145761"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5090014319","display_name":"Haochang Zhi","orcid":"https://orcid.org/0009-0001-1198-6915"},"institutions":[{"id":"https://openalex.org/I4210090971","display_name":"Southeast University","ror":"https://ror.org/00cf0ab87","country_code":"BD","type":"education","lineage":["https://openalex.org/I4210090971"]},{"id":"https://openalex.org/I76569877","display_name":"Southeast University","ror":"https://ror.org/04ct4d772","country_code":"CN","type":"education","lineage":["https://openalex.org/I76569877"]}],"countries":["BD","CN"],"is_corresponding":false,"raw_author_name":"Haochang Zhi","raw_affiliation_strings":["Southeast University,School of Electronic Science and Engineering,Nanjing,China,214135"],"affiliations":[{"raw_affiliation_string":"Southeast University,School of Electronic Science and Engineering,Nanjing,China,214135","institution_ids":["https://openalex.org/I76569877","https://openalex.org/I4210090971"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Jiang Xiao","orcid":null},"institutions":[{"id":"https://openalex.org/I4210145761","display_name":"Shenzhen Institutes of Advanced Technology","ror":"https://ror.org/04gh4er46","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210145761"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jiang Xiao","raw_affiliation_strings":["Shenzhen Institute for Advanced Study University of Electronic Science and Technology of China,Shenzhen,China,518110"],"affiliations":[{"raw_affiliation_string":"Shenzhen Institute for Advanced Study University of Electronic Science and Technology of China,Shenzhen,China,518110","institution_ids":["https://openalex.org/I4210145761"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5079056437","display_name":"Keren Zhu","orcid":"https://orcid.org/0000-0003-2698-141X"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Keren Zhu","raw_affiliation_strings":["Fudan University,School of Microelectronics,Shanghai,China,200433"],"affiliations":[{"raw_affiliation_string":"Fudan University,School of Microelectronics,Shanghai,China,200433","institution_ids":["https://openalex.org/I4210132426","https://openalex.org/I24943067"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100616601","display_name":"Yun Li","orcid":"https://orcid.org/0000-0002-1195-5000"},"institutions":[{"id":"https://openalex.org/I4210145761","display_name":"Shenzhen Institutes of Advanced Technology","ror":"https://ror.org/04gh4er46","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210145761"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yun Li","raw_affiliation_strings":["Shenzhen Institute for Advanced Study University of Electronic Science and Technology of China,Shenzhen,China,518110"],"affiliations":[{"raw_affiliation_string":"Shenzhen Institute for Advanced Study University of Electronic Science and Technology of China,Shenzhen,China,518110","institution_ids":["https://openalex.org/I4210145761"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5100334715"],"corresponding_institution_ids":["https://openalex.org/I4210145761"],"apc_list":null,"apc_paid":null,"fwci":6.428,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.96783837,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":91,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"7"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9955999851226807,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9945999979972839,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/analogue-electronics","display_name":"Analogue electronics","score":0.5882999897003174},{"id":"https://openalex.org/keywords/mixed-signal-integrated-circuit","display_name":"Mixed-signal integrated circuit","score":0.5570999979972839},{"id":"https://openalex.org/keywords/decoupling","display_name":"Decoupling (probability)","score":0.4348999857902527},{"id":"https://openalex.org/keywords/analog-multiplier","display_name":"Analog multiplier","score":0.43070000410079956},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.4253999888896942},{"id":"https://openalex.org/keywords/bottleneck","display_name":"Bottleneck","score":0.4212000072002411},{"id":"https://openalex.org/keywords/transistor-model","display_name":"Transistor model","score":0.40880000591278076},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.4027999937534332},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.39820000529289246}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.641700029373169},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.6025000214576721},{"id":"https://openalex.org/C29074008","wikidata":"https://www.wikidata.org/wiki/Q174925","display_name":"Analogue electronics","level":3,"score":0.5882999897003174},{"id":"https://openalex.org/C62907940","wikidata":"https://www.wikidata.org/wiki/Q1541329","display_name":"Mixed-signal integrated circuit","level":3,"score":0.5570999979972839},{"id":"https://openalex.org/C205606062","wikidata":"https://www.wikidata.org/wiki/Q5249645","display_name":"Decoupling (probability)","level":2,"score":0.4348999857902527},{"id":"https://openalex.org/C98142538","wikidata":"https://www.wikidata.org/wiki/Q485005","display_name":"Analog multiplier","level":4,"score":0.43070000410079956},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.4253999888896942},{"id":"https://openalex.org/C2780513914","wikidata":"https://www.wikidata.org/wiki/Q18210350","display_name":"Bottleneck","level":2,"score":0.4212000072002411},{"id":"https://openalex.org/C150169584","wikidata":"https://www.wikidata.org/wiki/Q7834319","display_name":"Transistor model","level":4,"score":0.40880000591278076},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.4027999937534332},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.39820000529289246},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.3971000015735626},{"id":"https://openalex.org/C2776359362","wikidata":"https://www.wikidata.org/wiki/Q2145286","display_name":"Representation (politics)","level":3,"score":0.3928999900817871},{"id":"https://openalex.org/C90915687","wikidata":"https://www.wikidata.org/wiki/Q63759","display_name":"Analog computer","level":2,"score":0.3824000060558319},{"id":"https://openalex.org/C194571574","wikidata":"https://www.wikidata.org/wiki/Q2251187","display_name":"Linear circuit","level":4,"score":0.37040001153945923},{"id":"https://openalex.org/C23572009","wikidata":"https://www.wikidata.org/wiki/Q964981","display_name":"Equivalent circuit","level":3,"score":0.36890000104904175},{"id":"https://openalex.org/C177148314","wikidata":"https://www.wikidata.org/wiki/Q170084","display_name":"Generalization","level":2,"score":0.366100013256073},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.3582000136375427},{"id":"https://openalex.org/C379707","wikidata":"https://www.wikidata.org/wiki/Q2328303","display_name":"Analog signal processing","level":4,"score":0.335999995470047},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.32249999046325684},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.322299987077713},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.3206000030040741},{"id":"https://openalex.org/C13412647","wikidata":"https://www.wikidata.org/wiki/Q174948","display_name":"Analog signal","level":3,"score":0.3098999857902527},{"id":"https://openalex.org/C78639753","wikidata":"https://www.wikidata.org/wiki/Q3318160","display_name":"Behavioral modeling","level":2,"score":0.288100004196167},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.28679999709129333},{"id":"https://openalex.org/C117896860","wikidata":"https://www.wikidata.org/wiki/Q11376","display_name":"Acceleration","level":2,"score":0.2791000008583069},{"id":"https://openalex.org/C158622935","wikidata":"https://www.wikidata.org/wiki/Q660848","display_name":"Nonlinear system","level":2,"score":0.2782000005245209},{"id":"https://openalex.org/C96654402","wikidata":"https://www.wikidata.org/wiki/Q5469962","display_name":"Formal equivalence checking","level":3,"score":0.26249998807907104},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.2563999891281128}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/dac63849.2025.11133189","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dac63849.2025.11133189","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 62nd ACM/IEEE Design Automation Conference (DAC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320337504","display_name":"Research and Development","ror":"https://ror.org/027s68j25"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W1486164486","https://openalex.org/W2034498767","https://openalex.org/W2042341775","https://openalex.org/W2143419558","https://openalex.org/W2475898412","https://openalex.org/W2758603753","https://openalex.org/W2769791151","https://openalex.org/W2946134630","https://openalex.org/W3092618035","https://openalex.org/W3160469020","https://openalex.org/W4247680473","https://openalex.org/W4312268114","https://openalex.org/W4386634475","https://openalex.org/W4386764871","https://openalex.org/W4386764902","https://openalex.org/W4389162407","https://openalex.org/W4389166704","https://openalex.org/W4389776171","https://openalex.org/W4393140668","https://openalex.org/W4401568381","https://openalex.org/W4409282428"],"related_works":[],"abstract_inverted_index":{"Analog":[0],"IC":[1,23],"design":[2,24,55,187],"is":[3,15,25,32],"mainly":[4],"manual":[5],"and":[6,31,45,81,164],"implemented":[7],"at":[8],"the":[9,87,143],"device":[10],"level.":[11],"A":[12],"major":[13],"reason":[14],"circuit":[16,69,113],"behavior-extraction.":[17],"Unlike":[18],"its":[19],"digital":[20],"counterpart,":[21],"analog":[22,47,54,65],"strongly":[26],"coupled":[27],"with":[28,116,135],"technology":[29],"nodes":[30],"difficult":[33],"to":[34,98,110,120,153,167,182],"represent":[35],"by":[36],"an":[37],"abstract":[38],"behavioral":[39],"model.":[40],"The":[41],"lack":[42],"of":[43,76,161],"accurate":[44],"efficient":[46],"modeling":[48],"has":[49],"become":[50],"a":[51,60,91,103,132,137,150],"bottleneck":[52],"in":[53,157,170,186],"automation.":[56],"This":[57],"paper":[58],"proposes":[59],"behavior-centric":[61],"optimization":[62,83],"framework":[63,148],"for":[64,93],"circuits":[66],"that":[67],"represents":[68],"behavior":[70,115],"using":[71],"transistor":[72,95],"electrical":[73,96],"properties":[74,97],"instead":[75],"sizes,":[77],"improving":[78],"model":[79],"generalization":[80],"reducing":[82],"complexity.":[84],"To":[85],"characterize":[86],"process,":[88],"we":[89,101],"propose":[90],"method":[92],"mapping":[94],"sizes.":[99],"Moreover,":[100],"developed":[102],"radial":[104],"basis":[105],"functions-based":[106],"Kolmogorov-Arnold":[107],"network":[108],"(RBF-KAN)":[109],"accurately":[111],"approximate":[112],"nonlinear":[114],"limited":[117],"simulations.":[118,140],"Compared":[119],"blackbox":[121],"modeling,":[122],"our":[123,147],"approach":[124],"enables":[125],"constructing":[126],"surrogate":[127],"models":[128],"via":[129],"KAN":[130],"under":[131],"set":[133],"specification":[134],"just":[136],"few":[138],"hundred":[139],"Experiments":[141],"on":[142],"testing":[144],"suite":[145],"showed":[146],"achieved":[149],"$1.76":[151],"\\times$":[152,155,166,169,181,184],"$2.64":[154],"improvement":[156],"large":[158],"signal":[159,172],"figure":[160],"merit":[162],"(FOM)":[163],"$1.73":[165],"$2.48":[168],"small":[171],"FOM":[173],"over":[174],"state-of-the-art":[175],"methods,":[176],"while":[177],"also":[178],"enabling":[179],"$3.5":[180],"$6.2":[183],"acceleration":[185],"porting.":[188]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2025,"cited_by_count":1}],"updated_date":"2026-04-16T08:26:57.006410","created_date":"2025-10-10T00:00:00"}
