{"id":"https://openalex.org/W4414198165","doi":"https://doi.org/10.1109/dac63849.2025.11132870","title":"Near-Memory LLM Inference Processor based on 3D DRAM-to-logic Hybrid Bonding","display_name":"Near-Memory LLM Inference Processor based on 3D DRAM-to-logic Hybrid Bonding","publication_year":2025,"publication_date":"2025-06-22","ids":{"openalex":"https://openalex.org/W4414198165","doi":"https://doi.org/10.1109/dac63849.2025.11132870"},"language":"en","primary_location":{"id":"doi:10.1109/dac63849.2025.11132870","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dac63849.2025.11132870","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 62nd ACM/IEEE Design Automation Conference (DAC)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5029049879","display_name":"SangHyeok Han","orcid":"https://orcid.org/0000-0002-5914-5883"},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Sanghyeok Han","raw_affiliation_strings":["Seoul National University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Seoul National University","institution_ids":["https://openalex.org/I139264467"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Byungkuk Yoon","orcid":null},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Byungkuk Yoon","raw_affiliation_strings":["Seoul National University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Seoul National University","institution_ids":["https://openalex.org/I139264467"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5086975094","display_name":"Gyeonghwan Park","orcid":null},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Gyeonghwan Park","raw_affiliation_strings":["Seoul National University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Seoul National University","institution_ids":["https://openalex.org/I139264467"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5076082641","display_name":"Choungki Song","orcid":null},"institutions":[{"id":"https://openalex.org/I10654025","display_name":"SK Group (United States)","ror":"https://ror.org/00qajw440","country_code":"US","type":"company","lineage":["https://openalex.org/I10654025","https://openalex.org/I134353371"]},{"id":"https://openalex.org/I4210112278","display_name":"SK Group (Japan)","ror":"https://ror.org/02axkyn34","country_code":"JP","type":"company","lineage":["https://openalex.org/I134353371","https://openalex.org/I4210112278"]}],"countries":["JP","US"],"is_corresponding":false,"raw_author_name":"Choungki Song","raw_affiliation_strings":["SK Hynix DRAM Development"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"SK Hynix DRAM Development","institution_ids":["https://openalex.org/I10654025","https://openalex.org/I4210112278"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100655990","display_name":"Dongkyun Kim","orcid":"https://orcid.org/0000-0002-1995-378X"},"institutions":[{"id":"https://openalex.org/I10654025","display_name":"SK Group (United States)","ror":"https://ror.org/00qajw440","country_code":"US","type":"company","lineage":["https://openalex.org/I10654025","https://openalex.org/I134353371"]},{"id":"https://openalex.org/I4210112278","display_name":"SK Group (Japan)","ror":"https://ror.org/02axkyn34","country_code":"JP","type":"company","lineage":["https://openalex.org/I134353371","https://openalex.org/I4210112278"]}],"countries":["JP","US"],"is_corresponding":false,"raw_author_name":"Dongkyun Kim","raw_affiliation_strings":["SK Hynix DRAM Development"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"SK Hynix DRAM Development","institution_ids":["https://openalex.org/I10654025","https://openalex.org/I4210112278"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5042758354","display_name":"Jae-Joon Kim","orcid":"https://orcid.org/0000-0003-1226-2537"},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Jae-Joon Kim","raw_affiliation_strings":["Seoul National University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Seoul National University","institution_ids":["https://openalex.org/I139264467"]}]}],"institutions":[],"countries_distinct_count":3,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"7"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.977400004863739,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.977400004863739,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9761000275611877,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11338","display_name":"Advancements in Photolithography Techniques","score":0.961899995803833,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/boosting","display_name":"Boosting (machine learning)","score":0.6680999994277954},{"id":"https://openalex.org/keywords/inference","display_name":"Inference","score":0.513700008392334},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.453900009393692},{"id":"https://openalex.org/keywords/memory-bandwidth","display_name":"Memory bandwidth","score":0.4336000084877014},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.3797000050544739},{"id":"https://openalex.org/keywords/controller","display_name":"Controller (irrigation)","score":0.36500000953674316},{"id":"https://openalex.org/keywords/dual","display_name":"Dual (grammatical number)","score":0.35100001096725464},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.3402000069618225}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.794700026512146},{"id":"https://openalex.org/C46686674","wikidata":"https://www.wikidata.org/wiki/Q466303","display_name":"Boosting (machine learning)","level":2,"score":0.6680999994277954},{"id":"https://openalex.org/C2776214188","wikidata":"https://www.wikidata.org/wiki/Q408386","display_name":"Inference","level":2,"score":0.513700008392334},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.49050000309944153},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.453900009393692},{"id":"https://openalex.org/C188045654","wikidata":"https://www.wikidata.org/wiki/Q17148339","display_name":"Memory bandwidth","level":2,"score":0.4336000084877014},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.40619999170303345},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.3797000050544739},{"id":"https://openalex.org/C203479927","wikidata":"https://www.wikidata.org/wiki/Q5165939","display_name":"Controller (irrigation)","level":2,"score":0.36500000953674316},{"id":"https://openalex.org/C2780980858","wikidata":"https://www.wikidata.org/wiki/Q110022","display_name":"Dual (grammatical number)","level":2,"score":0.35100001096725464},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.3402000069618225},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.3328999876976013},{"id":"https://openalex.org/C557945733","wikidata":"https://www.wikidata.org/wiki/Q389772","display_name":"Data transmission","level":2,"score":0.3257000148296356},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.32260000705718994},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.3127000033855438},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3082999885082245},{"id":"https://openalex.org/C63479239","wikidata":"https://www.wikidata.org/wiki/Q7353546","display_name":"Robustness (evolution)","level":3,"score":0.3003999888896942},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.28299999237060547},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2718999981880188},{"id":"https://openalex.org/C81147070","wikidata":"https://www.wikidata.org/wiki/Q1172449","display_name":"Encapsulation (networking)","level":2,"score":0.2685000002384186},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.26809999346733093},{"id":"https://openalex.org/C175291020","wikidata":"https://www.wikidata.org/wiki/Q1156822","display_name":"Offset (computer science)","level":2,"score":0.26339998841285706},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.25450000166893005}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/dac63849.2025.11132870","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dac63849.2025.11132870","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 62nd ACM/IEEE Design Automation Conference (DAC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320317879","display_name":"SK Hynix","ror":null},{"id":"https://openalex.org/F4320321292","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542"},{"id":"https://openalex.org/F4320322202","display_name":"IC Design Education Center","ror":"https://ror.org/005v57z85"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W2588191434","https://openalex.org/W2953212265","https://openalex.org/W3127736057","https://openalex.org/W3190062760","https://openalex.org/W4292261931","https://openalex.org/W4386763416","https://openalex.org/W4386763802","https://openalex.org/W4386763865","https://openalex.org/W4386765257","https://openalex.org/W4387321091","https://openalex.org/W4387968365","https://openalex.org/W4392427708","https://openalex.org/W4394998968","https://openalex.org/W4396219010","https://openalex.org/W4401211704","https://openalex.org/W4401211878"],"related_works":[],"abstract_inverted_index":{"Large":[0],"language":[1],"model":[2,86],"(LLM)":[3],"inference":[4],"poses":[5],"dual":[6],"challenges,":[7],"demanding":[8],"substantial":[9],"memory":[10],"bandwidth":[11],"and":[12,60,95,103],"computing":[13],"resources.":[14],"Recent":[15],"advancements":[16],"in":[17,40],"near-memory":[18],"accelerators":[19],"leveraging":[20],"3D":[21],"DRAM-to-logic":[22],"hybrid-bonding":[23],"(HB)":[24],"interconnects":[25],"have":[26],"gained":[27],"attention":[28],"due":[29],"to":[30,100],"their":[31],"highly":[32],"parallel":[33],"data":[34],"transfer":[35],"capabilities.":[36],"We":[37],"address":[38],"limitations":[39],"previous":[41],"HB-DRAM":[42],"accelerators,":[43],"such":[44],"as":[45],"those":[46],"stemming":[47],"from":[48],"distributed":[49],"controller":[50,59],"designs,":[51],"by":[52],"introducing":[53],"an":[54],"architecture":[55],"with":[56],"a":[57],"centralized":[58],"dual-IO":[61],"scheme.":[62],"This":[63],"approach":[64],"not":[65],"only":[66],"reduces":[67],"the":[68,79,83],"chip":[69],"area":[70],"overhead":[71],"but":[72],"also":[73],"enables":[74],"reconfigurable":[75],"GEMV/GEMM":[76],"operations,":[77],"boosting":[78],"performance.":[80],"Simulations":[81],"for":[82],"OPT":[84],"66B":[85],"show":[87],"that":[88],"our":[89],"proposed":[90],"accelerator":[91],"achieves":[92],"2.9X,":[93],"3.5X,":[94],"2.5X":[96],"higher":[97],"performance":[98],"compared":[99],"NPU,":[101],"DRAM-PIM,":[102],"heterogeneous":[104],"designs":[105],"(DRAM-PIM":[106],"+":[107],"NPU),":[108],"respectively.":[109]},"counts_by_year":[{"year":2026,"cited_by_count":2}],"updated_date":"2026-07-22T07:51:19.307946","created_date":"2025-10-10T00:00:00"}
