{"id":"https://openalex.org/W4414197579","doi":"https://doi.org/10.1109/dac63849.2025.11132552","title":"MARIO: A Superadditive Multi-Algorithm Interworking Optimization Framework for Analog Circuit Sizing","display_name":"MARIO: A Superadditive Multi-Algorithm Interworking Optimization Framework for Analog Circuit Sizing","publication_year":2025,"publication_date":"2025-06-22","ids":{"openalex":"https://openalex.org/W4414197579","doi":"https://doi.org/10.1109/dac63849.2025.11132552"},"language":"en","primary_location":{"id":"doi:10.1109/dac63849.2025.11132552","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dac63849.2025.11132552","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 62nd ACM/IEEE Design Automation Conference (DAC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5074909258","display_name":"Wangzhen Li","orcid":"https://orcid.org/0009-0005-1005-0911"},"institutions":[{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]},{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Wangzhen Li","raw_affiliation_strings":["Fudan University,State Key Lab of ASIC & System,Microelectronics Department,Shanghai,China"],"affiliations":[{"raw_affiliation_string":"Fudan University,State Key Lab of ASIC & System,Microelectronics Department,Shanghai,China","institution_ids":["https://openalex.org/I4210132426","https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5057149253","display_name":"Yuan Meng","orcid":"https://orcid.org/0009-0005-8275-490X"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yuan Meng","raw_affiliation_strings":["Fudan University,State Key Lab of ASIC & System,Microelectronics Department,Shanghai,China"],"affiliations":[{"raw_affiliation_string":"Fudan University,State Key Lab of ASIC & System,Microelectronics Department,Shanghai,China","institution_ids":["https://openalex.org/I4210132426","https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5113152107","display_name":"Ruiyu Lyu","orcid":"https://orcid.org/0009-0000-5071-0674"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Ruiyu Lyu","raw_affiliation_strings":["Fudan University,State Key Lab of ASIC & System,Microelectronics Department,Shanghai,China"],"affiliations":[{"raw_affiliation_string":"Fudan University,State Key Lab of ASIC & System,Microelectronics Department,Shanghai,China","institution_ids":["https://openalex.org/I4210132426","https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5037328458","display_name":"Changhao Yan","orcid":"https://orcid.org/0000-0002-8936-3945"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Changhao Yan","raw_affiliation_strings":["Fudan University,State Key Lab of ASIC & System,Microelectronics Department,Shanghai,China"],"affiliations":[{"raw_affiliation_string":"Fudan University,State Key Lab of ASIC & System,Microelectronics Department,Shanghai,China","institution_ids":["https://openalex.org/I4210132426","https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5079056437","display_name":"Keren Zhu","orcid":"https://orcid.org/0000-0003-2698-141X"},"institutions":[{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]},{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Keren Zhu","raw_affiliation_strings":["Fudan University,State Key Lab of ASIC & System,Microelectronics Department,Shanghai,China"],"affiliations":[{"raw_affiliation_string":"Fudan University,State Key Lab of ASIC & System,Microelectronics Department,Shanghai,China","institution_ids":["https://openalex.org/I4210132426","https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5039204202","display_name":"Zhaori Bi","orcid":"https://orcid.org/0000-0002-7315-3150"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhaori Bi","raw_affiliation_strings":["Fudan University,State Key Lab of ASIC & System,Microelectronics Department,Shanghai,China"],"affiliations":[{"raw_affiliation_string":"Fudan University,State Key Lab of ASIC & System,Microelectronics Department,Shanghai,China","institution_ids":["https://openalex.org/I4210132426","https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5058431987","display_name":"Detang Zhou","orcid":"https://orcid.org/0000-0003-0544-2070"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Dian Zhou","raw_affiliation_strings":["Fudan University,State Key Lab of ASIC & System,Microelectronics Department,Shanghai,China"],"affiliations":[{"raw_affiliation_string":"Fudan University,State Key Lab of ASIC & System,Microelectronics Department,Shanghai,China","institution_ids":["https://openalex.org/I4210132426","https://openalex.org/I24943067"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5064213921","display_name":"Xuan Zeng","orcid":"https://orcid.org/0000-0002-8097-4053"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xuan Zeng","raw_affiliation_strings":["Fudan University,State Key Lab of ASIC & System,Microelectronics Department,Shanghai,China"],"affiliations":[{"raw_affiliation_string":"Fudan University,State Key Lab of ASIC & System,Microelectronics Department,Shanghai,China","institution_ids":["https://openalex.org/I4210132426","https://openalex.org/I24943067"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":8,"corresponding_author_ids":["https://openalex.org/A5074909258"],"corresponding_institution_ids":["https://openalex.org/I24943067","https://openalex.org/I4210132426"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.25610725,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"7"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9977999925613403,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/superadditivity","display_name":"Superadditivity","score":0.6180999875068665},{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.5710999965667725},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.45840001106262207},{"id":"https://openalex.org/keywords/optimization-problem","display_name":"Optimization problem","score":0.45559999346733093},{"id":"https://openalex.org/keywords/sizing","display_name":"Sizing","score":0.44040000438690186},{"id":"https://openalex.org/keywords/kriging","display_name":"Kriging","score":0.37389999628067017},{"id":"https://openalex.org/keywords/global-optimization","display_name":"Global optimization","score":0.36010000109672546},{"id":"https://openalex.org/keywords/linear-programming","display_name":"Linear programming","score":0.35359999537467957}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7490000128746033},{"id":"https://openalex.org/C20017120","wikidata":"https://www.wikidata.org/wiki/Q922087","display_name":"Superadditivity","level":2,"score":0.6180999875068665},{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.5710999965667725},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.45840001106262207},{"id":"https://openalex.org/C137836250","wikidata":"https://www.wikidata.org/wiki/Q984063","display_name":"Optimization problem","level":2,"score":0.45559999346733093},{"id":"https://openalex.org/C2777767291","wikidata":"https://www.wikidata.org/wiki/Q1080291","display_name":"Sizing","level":2,"score":0.44040000438690186},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.40540000796318054},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.40059998631477356},{"id":"https://openalex.org/C81692654","wikidata":"https://www.wikidata.org/wiki/Q225926","display_name":"Kriging","level":2,"score":0.37389999628067017},{"id":"https://openalex.org/C164752517","wikidata":"https://www.wikidata.org/wiki/Q5570875","display_name":"Global optimization","level":2,"score":0.36010000109672546},{"id":"https://openalex.org/C41045048","wikidata":"https://www.wikidata.org/wiki/Q202843","display_name":"Linear programming","level":2,"score":0.35359999537467957},{"id":"https://openalex.org/C56086750","wikidata":"https://www.wikidata.org/wiki/Q6042592","display_name":"Integer programming","level":2,"score":0.3395000100135803},{"id":"https://openalex.org/C2987595161","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Optimization algorithm","level":2,"score":0.3278999924659729},{"id":"https://openalex.org/C206345919","wikidata":"https://www.wikidata.org/wiki/Q20380951","display_name":"Resource (disambiguation)","level":2,"score":0.31940001249313354},{"id":"https://openalex.org/C61326573","wikidata":"https://www.wikidata.org/wiki/Q1496376","display_name":"Gaussian process","level":3,"score":0.3061999976634979},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.29980000853538513},{"id":"https://openalex.org/C29202148","wikidata":"https://www.wikidata.org/wiki/Q287260","display_name":"Resource allocation","level":2,"score":0.29589998722076416},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.28999999165534973},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.2743000090122223},{"id":"https://openalex.org/C70970002","wikidata":"https://www.wikidata.org/wiki/Q189434","display_name":"Multiplexer","level":3,"score":0.2696000039577484},{"id":"https://openalex.org/C2781215313","wikidata":"https://www.wikidata.org/wiki/Q3493345","display_name":"SPARK (programming language)","level":2,"score":0.2619999945163727},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.2581000030040741}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/dac63849.2025.11132552","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dac63849.2025.11132552","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 62nd ACM/IEEE Design Automation Conference (DAC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":28,"referenced_works":["https://openalex.org/W1552715261","https://openalex.org/W1964239621","https://openalex.org/W1996615911","https://openalex.org/W2057830724","https://openalex.org/W2065183815","https://openalex.org/W2074046446","https://openalex.org/W2085737637","https://openalex.org/W2107913933","https://openalex.org/W2115728676","https://openalex.org/W2154684505","https://openalex.org/W2171074980","https://openalex.org/W2736440494","https://openalex.org/W2768617563","https://openalex.org/W2769791151","https://openalex.org/W2898873842","https://openalex.org/W2943857514","https://openalex.org/W2958454712","https://openalex.org/W3039845339","https://openalex.org/W3131312709","https://openalex.org/W3160469020","https://openalex.org/W3197990381","https://openalex.org/W3212050490","https://openalex.org/W4238892808","https://openalex.org/W4256262456","https://openalex.org/W4386634475","https://openalex.org/W4386764871","https://openalex.org/W4401042992","https://openalex.org/W4409282428"],"related_works":[],"abstract_inverted_index":{"Numeric":[0],"optimization":[1,35,60,64,93,145,153],"methods":[2],"are":[3,130],"widely":[4],"utilized":[5],"to":[6,40,96],"tackle":[7],"complex":[8],"analog":[9],"circuit":[10],"sizing":[11],"problems,":[12],"where":[13],"the":[14,25,108,148,151],"challenges":[15],"include":[16],"expensive":[17],"simulations,":[18],"non-linearity,":[19],"and":[20,73,91,98,144],"high":[21],"parameter":[22],"dimensionality.":[23],"However,":[24],"diverse":[26],"characteristics":[27],"exhibited":[28],"by":[29],"different":[30,127],"circuits":[31],"result":[32],"in":[33],"varied":[34],"landscapes,":[36],"making":[37],"it":[38],"difficult":[39],"identify":[41],"a":[42,57,68,74,80],"single":[43],"algorithm":[44],"that":[45],"consistently":[46],"outperforms":[47],"others":[48],"across":[49,121],"all":[50],"problems.":[51],"In":[52],"this":[53],"paper,":[54],"we":[55],"introduce":[56],"multi-algorithm":[58],"interworking":[59],"framework,":[61],"which":[62,85],"achieves":[63],"superadditivity":[65],"based":[66],"on":[67],"pool":[69],"of":[70,102,150],"member":[71,103,122],"algorithms":[72,125,146],"powerful":[75],"algorithm-interworking":[76],"protocol.":[77],"We":[78],"propose":[79],"computing":[81,109],"resource":[82],"reallocation":[83],"method,":[84],"employs":[86],"multitask":[87],"Gaussian":[88],"process":[89],"regression":[90],"portfolio":[92],"techniques,":[94],"leading":[95],"flexible":[97],"prudent":[99],"online":[100],"adaption":[101],"algorithms.":[104,123],"To":[105],"efficiently":[106],"utilize":[107],"resources":[110],"for":[111],"local":[112],"exploitation,":[113],"an":[114,134],"evaluation":[115],"data":[116],"broadcast":[117],"strategy":[118],"enables":[119],"cooperativeness":[120],"Besides,":[124],"with":[126],"modeling":[128],"overheads":[129],"integrated":[131],"time-adaptively":[132],"via":[133],"asynchronous":[135],"parallelization":[136],"mechanism.":[137],"Comparative":[138],"experiments":[139],"against":[140],"state-of-the-art":[141],"algorithmcombining":[142],"tools":[143],"demonstrate":[147],"superiority":[149],"proposed":[152],"framework.":[154]},"counts_by_year":[],"updated_date":"2026-03-07T16:01:11.037858","created_date":"2025-10-10T00:00:00"}