{"id":"https://openalex.org/W4414198111","doi":"https://doi.org/10.1109/dac63849.2025.11132463","title":"A Full-system, Programmable, and Extensible In-Memory Computing Simulation Framework for Deep Learning","display_name":"A Full-system, Programmable, and Extensible In-Memory Computing Simulation Framework for Deep Learning","publication_year":2025,"publication_date":"2025-06-22","ids":{"openalex":"https://openalex.org/W4414198111","doi":"https://doi.org/10.1109/dac63849.2025.11132463"},"language":"en","primary_location":{"id":"doi:10.1109/dac63849.2025.11132463","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dac63849.2025.11132463","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 62nd ACM/IEEE Design Automation Conference (DAC)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5072251182","display_name":"Kaining Zhou","orcid":"https://orcid.org/0000-0002-9192-6137"},"institutions":[{"id":"https://openalex.org/I157725225","display_name":"University of Illinois Urbana-Champaign","ror":"https://ror.org/047426m28","country_code":"US","type":"education","lineage":["https://openalex.org/I157725225"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Kaining Zhou","raw_affiliation_strings":["University of Illinois at Urbana-Champaign,IL,USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Illinois at Urbana-Champaign,IL,USA","institution_ids":["https://openalex.org/I157725225"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5066790771","display_name":"Jian Huang","orcid":"https://orcid.org/0000-0002-6267-8824"},"institutions":[{"id":"https://openalex.org/I157725225","display_name":"University of Illinois Urbana-Champaign","ror":"https://ror.org/047426m28","country_code":"US","type":"education","lineage":["https://openalex.org/I157725225"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jian Huang","raw_affiliation_strings":["University of Illinois at Urbana-Champaign,IL,USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Illinois at Urbana-Champaign,IL,USA","institution_ids":["https://openalex.org/I157725225"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5037648751","display_name":"Nam Sung Kim","orcid":"https://orcid.org/0000-0002-0442-5634"},"institutions":[{"id":"https://openalex.org/I157725225","display_name":"University of Illinois Urbana-Champaign","ror":"https://ror.org/047426m28","country_code":"US","type":"education","lineage":["https://openalex.org/I157725225"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Nam Sung Kim","raw_affiliation_strings":["University of Illinois at Urbana-Champaign,IL,USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Illinois at Urbana-Champaign,IL,USA","institution_ids":["https://openalex.org/I157725225"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5057014407","display_name":"Naresh R. Shanbhag","orcid":"https://orcid.org/0000-0002-4323-9164"},"institutions":[{"id":"https://openalex.org/I157725225","display_name":"University of Illinois Urbana-Champaign","ror":"https://ror.org/047426m28","country_code":"US","type":"education","lineage":["https://openalex.org/I157725225"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Naresh Shanbhag","raw_affiliation_strings":["University of Illinois at Urbana-Champaign,IL,USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Illinois at Urbana-Champaign,IL,USA","institution_ids":["https://openalex.org/I157725225"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I157725225"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"7"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.8564000129699707,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.8564000129699707,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11948","display_name":"Machine Learning in Materials Science","score":0.8396000266075134,"subfield":{"id":"https://openalex.org/subfields/2505","display_name":"Materials Chemistry"},"field":{"id":"https://openalex.org/fields/25","display_name":"Materials Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.7444000244140625,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.6563000082969666},{"id":"https://openalex.org/keywords/flexibility","display_name":"Flexibility (engineering)","score":0.5284000039100647},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.49390000104904175},{"id":"https://openalex.org/keywords/deep-learning","display_name":"Deep learning","score":0.4934999942779541},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.46970000863075256},{"id":"https://openalex.org/keywords/extensibility","display_name":"Extensibility","score":0.3968999981880188},{"id":"https://openalex.org/keywords/transformer","display_name":"Transformer","score":0.34459999203681946},{"id":"https://openalex.org/keywords/design-space-exploration","display_name":"Design space exploration","score":0.3418000042438507}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8029999732971191},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.6639000177383423},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.6563000082969666},{"id":"https://openalex.org/C2780598303","wikidata":"https://www.wikidata.org/wiki/Q65921492","display_name":"Flexibility (engineering)","level":2,"score":0.5284000039100647},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.49390000104904175},{"id":"https://openalex.org/C108583219","wikidata":"https://www.wikidata.org/wiki/Q197536","display_name":"Deep learning","level":2,"score":0.4934999942779541},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.46970000863075256},{"id":"https://openalex.org/C32833848","wikidata":"https://www.wikidata.org/wiki/Q4115054","display_name":"Extensibility","level":2,"score":0.3968999981880188},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.37779998779296875},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3747999966144562},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.351500004529953},{"id":"https://openalex.org/C66322947","wikidata":"https://www.wikidata.org/wiki/Q11658","display_name":"Transformer","level":3,"score":0.34459999203681946},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.3418000042438507},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.31200000643730164},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3025999963283539},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.29179999232292175},{"id":"https://openalex.org/C52913732","wikidata":"https://www.wikidata.org/wiki/Q857102","display_name":"Software design","level":4,"score":0.2883000075817108},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.27959999442100525},{"id":"https://openalex.org/C2777466363","wikidata":"https://www.wikidata.org/wiki/Q17008971","display_name":"Design tool","level":2,"score":0.26170000433921814},{"id":"https://openalex.org/C167966045","wikidata":"https://www.wikidata.org/wiki/Q5532625","display_name":"Generative model","level":3,"score":0.2612000107765198},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.2581999897956848},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.25290000438690186}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/dac63849.2025.11132463","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dac63849.2025.11132463","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 62nd ACM/IEEE Design Automation Conference (DAC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320332180","display_name":"Defense Advanced Research Projects Agency","ror":"https://ror.org/02caytj08"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":24,"referenced_works":["https://openalex.org/W2002555321","https://openalex.org/W2108598243","https://openalex.org/W2146276996","https://openalex.org/W2194775991","https://openalex.org/W2725159389","https://openalex.org/W2899641901","https://openalex.org/W2913104037","https://openalex.org/W3033519076","https://openalex.org/W3133253223","https://openalex.org/W3134526034","https://openalex.org/W3135835558","https://openalex.org/W3165929947","https://openalex.org/W4220837341","https://openalex.org/W4221086307","https://openalex.org/W4225637124","https://openalex.org/W4312949026","https://openalex.org/W4323022446","https://openalex.org/W4360605703","https://openalex.org/W4360606196","https://openalex.org/W4360606939","https://openalex.org/W4360607286","https://openalex.org/W4380881077","https://openalex.org/W4390872297","https://openalex.org/W4400681289"],"related_works":[],"abstract_inverted_index":{"In-memory":[0],"computing":[1,28],"(IMC)":[2],"has":[3],"established":[4],"itself":[5],"as":[6,37,229],"an":[7,235],"attractive":[8],"alternative":[9],"to":[10,57,71,101,113,122,205,233],"hardware":[11],"accelerators":[12],"in":[13,109,189,241],"addressing":[14],"the":[15,49,59,139,195,201,221],"memory":[16,155],"wall":[17],"problem":[18],"for":[19,30,91,132,208,214,244],"artificial":[20],"intelligence":[21],"(AI)":[22],"workloads.":[23],"However,":[24],"designing":[25],"programmable":[26],"IMC-based":[27,212],"platforms":[29],"today\u2019s":[31],"large":[32,38],"generative":[33],"AI":[34,92],"models,":[35,93],"such":[36],"language":[39],"models":[40],"(LLMs)":[41],"and":[42,67,106,129,142,159,179,218,239],"diffusion":[43],"transformers":[44],"(DiTs),":[45],"is":[46,55],"hindered":[47],"by":[48,199],"absence":[50],"of":[51,98,144,150,197,211],"a":[52,80,95,180,185,219,230,245],"simulator":[53],"that":[54],"able":[56],"address":[58,74],"associated":[60],"scalability":[61],"challenges":[62],"while":[63],"simultaneously":[64],"incorporating":[65],"device":[66],"circuit-level":[68],"behaviors":[69],"intrinsic":[70],"IMCs.":[72,162],"To":[73,137],"this":[75],"challenge,":[76],"we":[77,146,193,226],"present":[78],"IMCsim,":[79,145],"versatile":[81],"fullsystem":[82],"IMC":[83,115,134,172,178,187,223],"simulation":[84],"framework.":[85],"IMCsim":[86,119,165,198,228],"integrates":[87],"software":[88],"runtime":[89],"libraries":[90],"introduces":[94],"new":[96],"set":[97],"ISA":[99],"extensions":[100],"express":[102],"common":[103],"tensor":[104],"operators,":[105],"provides":[107],"flexibility":[108],"mapping":[110],"these":[111],"operators":[112],"various":[114,133],"architectures.":[116],"As":[117],"such,":[118],"enables":[120],"designers":[121],"explore":[123],"trade-offs":[124],"between":[125],"performance,":[126],"energy,":[127],"area,":[128],"computational":[130],"accuracy":[131],"design":[135,188,203,231],"choices.":[136],"demonstrate":[138,194],"functionality,":[140],"efficiency,":[141],"versatility":[143],"model":[147],"three":[148,222],"types":[149],"IMCs:":[151],"(1)":[152],"embedded":[153],"non-volatile":[154],"(eNVM)-based,":[156],"(2)":[157],"SRAM-based,":[158],"(3)":[160],"digital":[161,186],"We":[163],"validate":[164],"using":[166],"measured":[167],"data":[168],"from":[169],"two":[170],"laboratory-tested":[171],"prototype":[173],"ICs\u2014a":[174],"22":[175],"nm":[176,182,243],"MRAM-based":[177],"28":[181,190,242],"SRAM-based":[183],"IMC\u2014and":[184],"nm.":[191],"Next,":[192],"utility":[196],"exploring":[200],"architectural":[202],"space":[204],"obtain":[206,234],"insights":[207],"maximizing":[209],"utilization":[210],"processors":[213],"diverse":[215],"workloads\u2014ResNet-18,":[216],"Llama,":[217],"DiT\u2014using":[220],"types.":[224],"Finally,":[225],"employ":[227],"tool":[232],"efficient":[236],"chip":[237],"architecture":[238],"layout":[240],"lightweight":[246],"DiT.":[247]},"counts_by_year":[],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}