{"id":"https://openalex.org/W4386763614","doi":"https://doi.org/10.1109/dac56929.2023.10247907","title":"General-Purpose Gate-Level Simulation with Partition-Agnostic Parallelism","display_name":"General-Purpose Gate-Level Simulation with Partition-Agnostic Parallelism","publication_year":2023,"publication_date":"2023-07-09","ids":{"openalex":"https://openalex.org/W4386763614","doi":"https://doi.org/10.1109/dac56929.2023.10247907"},"language":"en","primary_location":{"id":"doi:10.1109/dac56929.2023.10247907","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dac56929.2023.10247907","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 60th ACM/IEEE Design Automation Conference (DAC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5039573083","display_name":"Zizheng Guo","orcid":"https://orcid.org/0000-0002-0724-5356"},"institutions":[{"id":"https://openalex.org/I20231570","display_name":"Peking University","ror":"https://ror.org/02v51f717","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Zizheng Guo","raw_affiliation_strings":["Peking University,School of Integrated Circuits,Beijing,China","School of Integrated Circuits, Peking University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Peking University,School of Integrated Circuits,Beijing,China","institution_ids":["https://openalex.org/I20231570"]},{"raw_affiliation_string":"School of Integrated Circuits, Peking University, Beijing, China","institution_ids":["https://openalex.org/I20231570"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5045601421","display_name":"Zuodong Zhang","orcid":"https://orcid.org/0000-0002-8496-6114"},"institutions":[{"id":"https://openalex.org/I20231570","display_name":"Peking University","ror":"https://ror.org/02v51f717","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zuodong Zhang","raw_affiliation_strings":["Peking University,School of Integrated Circuits,Beijing,China","School of Integrated Circuits, Peking University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Peking University,School of Integrated Circuits,Beijing,China","institution_ids":["https://openalex.org/I20231570"]},{"raw_affiliation_string":"School of Integrated Circuits, Peking University, Beijing, China","institution_ids":["https://openalex.org/I20231570"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5089089524","display_name":"Xun Jiang","orcid":"https://orcid.org/0000-0001-5062-969X"},"institutions":[{"id":"https://openalex.org/I20231570","display_name":"Peking University","ror":"https://ror.org/02v51f717","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xun Jiang","raw_affiliation_strings":["Peking University,School of Integrated Circuits,Beijing,China","School of Integrated Circuits, Peking University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Peking University,School of Integrated Circuits,Beijing,China","institution_ids":["https://openalex.org/I20231570"]},{"raw_affiliation_string":"School of Integrated Circuits, Peking University, Beijing, China","institution_ids":["https://openalex.org/I20231570"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5034982668","display_name":"Wuxi Li","orcid":"https://orcid.org/0000-0002-9887-5109"},"institutions":[{"id":"https://openalex.org/I1311921367","display_name":"Advanced Micro Devices (Canada)","ror":"https://ror.org/02yh0k313","country_code":"CA","type":"company","lineage":["https://openalex.org/I1311921367","https://openalex.org/I4210137977"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Wuxi Li","raw_affiliation_strings":["AMD Inc"],"affiliations":[{"raw_affiliation_string":"AMD Inc","institution_ids":["https://openalex.org/I1311921367"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5000933188","display_name":"Yibo Lin","orcid":"https://orcid.org/0000-0002-0977-2774"},"institutions":[{"id":"https://openalex.org/I20231570","display_name":"Peking University","ror":"https://ror.org/02v51f717","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yibo Lin","raw_affiliation_strings":["Peking University,School of Integrated Circuits,Beijing,China","Institute of Electronic Design Automation, Peking University, Wuxi, China","School of Integrated Circuits, Peking University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Peking University,School of Integrated Circuits,Beijing,China","institution_ids":["https://openalex.org/I20231570"]},{"raw_affiliation_string":"Institute of Electronic Design Automation, Peking University, Wuxi, China","institution_ids":["https://openalex.org/I20231570"]},{"raw_affiliation_string":"School of Integrated Circuits, Peking University, Beijing, China","institution_ids":["https://openalex.org/I20231570"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5002760019","display_name":"Runsheng Wang","orcid":"https://orcid.org/0000-0002-7514-0767"},"institutions":[{"id":"https://openalex.org/I20231570","display_name":"Peking University","ror":"https://ror.org/02v51f717","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Runsheng Wang","raw_affiliation_strings":["Peking University,School of Integrated Circuits,Beijing,China","School of Integrated Circuits, Peking University, Beijing, China","Institute of Electronic Design Automation, Peking University, Wuxi, China"],"affiliations":[{"raw_affiliation_string":"Peking University,School of Integrated Circuits,Beijing,China","institution_ids":["https://openalex.org/I20231570"]},{"raw_affiliation_string":"School of Integrated Circuits, Peking University, Beijing, China","institution_ids":["https://openalex.org/I20231570"]},{"raw_affiliation_string":"Institute of Electronic Design Automation, Peking University, Wuxi, China","institution_ids":["https://openalex.org/I20231570"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5012603707","display_name":"Ru Huang","orcid":"https://orcid.org/0000-0001-7545-0987"},"institutions":[{"id":"https://openalex.org/I20231570","display_name":"Peking University","ror":"https://ror.org/02v51f717","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Ru Huang","raw_affiliation_strings":["Peking University,School of Integrated Circuits,Beijing,China","Institute of Electronic Design Automation, Peking University, Wuxi, China","School of Integrated Circuits, Peking University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Peking University,School of Integrated Circuits,Beijing,China","institution_ids":["https://openalex.org/I20231570"]},{"raw_affiliation_string":"Institute of Electronic Design Automation, Peking University, Wuxi, China","institution_ids":["https://openalex.org/I20231570"]},{"raw_affiliation_string":"School of Integrated Circuits, Peking University, Beijing, China","institution_ids":["https://openalex.org/I20231570"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":7,"corresponding_author_ids":["https://openalex.org/A5039573083"],"corresponding_institution_ids":["https://openalex.org/I20231570"],"apc_list":null,"apc_paid":null,"fwci":1.0189,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.78913813,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11195","display_name":"Simulation Techniques and Applications","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1803","display_name":"Management Science and Operations Research"},"field":{"id":"https://openalex.org/fields/18","display_name":"Decision Sciences"},"domain":{"id":"https://openalex.org/domains/2","display_name":"Social Sciences"}},"topics":[{"id":"https://openalex.org/T11195","display_name":"Simulation Techniques and Applications","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1803","display_name":"Management Science and Operations Research"},"field":{"id":"https://openalex.org/fields/18","display_name":"Decision Sciences"},"domain":{"id":"https://openalex.org/domains/2","display_name":"Social Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9958999752998352,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9944000244140625,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8253265619277954},{"id":"https://openalex.org/keywords/partition","display_name":"Partition (number theory)","score":0.695073127746582},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6899402141571045},{"id":"https://openalex.org/keywords/logic-simulation","display_name":"Logic simulation","score":0.6210883259773254},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.5222768783569336},{"id":"https://openalex.org/keywords/partition-problem","display_name":"Partition problem","score":0.45718643069267273},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.45528846979141235},{"id":"https://openalex.org/keywords/parallelism","display_name":"Parallelism (grammar)","score":0.4381883144378662},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.4198690950870514},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.41279226541519165},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.28484439849853516},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.17766189575195312}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8253265619277954},{"id":"https://openalex.org/C42812","wikidata":"https://www.wikidata.org/wiki/Q1082910","display_name":"Partition (number theory)","level":2,"score":0.695073127746582},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6899402141571045},{"id":"https://openalex.org/C64859876","wikidata":"https://www.wikidata.org/wiki/Q173673","display_name":"Logic simulation","level":3,"score":0.6210883259773254},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.5222768783569336},{"id":"https://openalex.org/C35995877","wikidata":"https://www.wikidata.org/wiki/Q1065968","display_name":"Partition problem","level":3,"score":0.45718643069267273},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.45528846979141235},{"id":"https://openalex.org/C2781172179","wikidata":"https://www.wikidata.org/wiki/Q853109","display_name":"Parallelism (grammar)","level":2,"score":0.4381883144378662},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.4198690950870514},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.41279226541519165},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.28484439849853516},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.17766189575195312},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/dac56929.2023.10247907","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dac56929.2023.10247907","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 60th ACM/IEEE Design Automation Conference (DAC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320335777","display_name":"National Key Research and Development Program of China","ror":null}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":22,"referenced_works":["https://openalex.org/W1565967564","https://openalex.org/W1971000143","https://openalex.org/W2059896017","https://openalex.org/W2075529514","https://openalex.org/W2095266728","https://openalex.org/W2102591716","https://openalex.org/W2123990187","https://openalex.org/W2133250872","https://openalex.org/W2143006079","https://openalex.org/W2248975694","https://openalex.org/W2277653173","https://openalex.org/W3094343833","https://openalex.org/W3114046495","https://openalex.org/W3114262462","https://openalex.org/W3146952922","https://openalex.org/W4200231758","https://openalex.org/W4252947404","https://openalex.org/W4293023278","https://openalex.org/W4293261783","https://openalex.org/W4320067872","https://openalex.org/W6634015105","https://openalex.org/W6683993923"],"related_works":["https://openalex.org/W2058965144","https://openalex.org/W2164382479","https://openalex.org/W2146343568","https://openalex.org/W98480971","https://openalex.org/W2150291671","https://openalex.org/W2013643406","https://openalex.org/W1984298705","https://openalex.org/W2365114398","https://openalex.org/W4386763614","https://openalex.org/W2361987408"],"abstract_inverted_index":{"Gate-level":[0],"simulation":[1,24,47,75,96,108],"with":[2,29,51,77],"delay":[3],"annotation":[4],"is":[5,18],"a":[6,23,72,82,89],"both":[7],"critical":[8],"and":[9,39,55,88],"time-consuming":[10],"task":[11],"in":[12],"the":[13,64],"circuit":[14,60],"design":[15,53],"flow.":[16],"It":[17],"highly":[19,57],"nontrivial":[20],"to":[21,62,103],"parallelize":[22],"process,":[25],"especially":[26],"on":[27,44,59],"designs":[28],"arbitrary":[30],"general-purpose":[31,73,95],"sequential":[32,84],"elements":[33,54],"such":[34],"as":[35],"latches,":[36],"gated":[37],"clocks,":[38],"scan":[40],"chains.":[41],"Current":[42],"works":[43],"parallelizing":[45],"gate-level":[46,74],"are":[48,56],"fundamentally":[49],"incompatible":[50],"these":[52],"reliant":[58],"partitioning":[61],"achieve":[63],"best":[65],"performance.":[66],"In":[67],"this":[68],"paper,":[69],"we":[70],"propose":[71,81],"engine":[76],"partition-agnostic":[78],"parallelism.":[79],"We":[80],"general":[83],"behavior":[85],"encoding":[86],"technique":[87],"fast":[90],"event":[91],"scheduling":[92],"algorithm":[93],"for":[94],"tasks.":[97],"Experimental":[98],"results":[99],"have":[100],"shown":[101],"up":[102],"30\u00d7":[104],"speed-up":[105],"over":[106],"commercial":[107],"engines.":[109]},"counts_by_year":[{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}