{"id":"https://openalex.org/W3150299212","doi":"https://doi.org/10.1109/dac18074.2021.9586304","title":"A Framework for Optimizing CPU-iGPU Communication on Embedded Platforms","display_name":"A Framework for Optimizing CPU-iGPU Communication on Embedded Platforms","publication_year":2021,"publication_date":"2021-11-08","ids":{"openalex":"https://openalex.org/W3150299212","doi":"https://doi.org/10.1109/dac18074.2021.9586304","mag":"3150299212"},"language":"en","primary_location":{"id":"doi:10.1109/dac18074.2021.9586304","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dac18074.2021.9586304","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 58th ACM/IEEE Design Automation Conference (DAC)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5000629795","display_name":"Francesco Lumpp","orcid":null},"institutions":[{"id":"https://openalex.org/I119439378","display_name":"University of Verona","ror":"https://ror.org/039bp8j42","country_code":"IT","type":"education","lineage":["https://openalex.org/I119439378"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Francesco Lumpp","raw_affiliation_strings":["Univ. of Verona, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Univ. of Verona, Italy","institution_ids":["https://openalex.org/I119439378"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5074065388","display_name":"Hiren Patel","orcid":"https://orcid.org/0000-0003-2750-4471"},"institutions":[{"id":"https://openalex.org/I151746483","display_name":"University of Waterloo","ror":"https://ror.org/01aff2v68","country_code":"CA","type":"education","lineage":["https://openalex.org/I151746483"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Hiren D. Patel","raw_affiliation_strings":["Univ. of Waterloo, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Univ. of Waterloo, Canada","institution_ids":["https://openalex.org/I151746483"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5088231786","display_name":"Nicola Bombieri","orcid":"https://orcid.org/0000-0003-3256-5885"},"institutions":[{"id":"https://openalex.org/I119439378","display_name":"University of Verona","ror":"https://ror.org/039bp8j42","country_code":"IT","type":"education","lineage":["https://openalex.org/I119439378"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Nicola Bombieri","raw_affiliation_strings":["Univ. of Verona, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Univ. of Verona, Italy","institution_ids":["https://openalex.org/I119439378"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"685","last_page":"690"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9973999857902527,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10715","display_name":"Distributed and Parallel Computing Systems","score":0.9965000152587891,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8580979108810425},{"id":"https://openalex.org/keywords/cache-coherence","display_name":"Cache coherence","score":0.739371120929718},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.6570984721183777},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.5578373074531555},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.48986026644706726},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4896546006202698},{"id":"https://openalex.org/keywords/central-processing-unit","display_name":"Central processing unit","score":0.4623820185661316},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.43653735518455505},{"id":"https://openalex.org/keywords/copying","display_name":"Copying","score":0.41490787267684937},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.294849693775177},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.26687008142471313}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8580979108810425},{"id":"https://openalex.org/C141917322","wikidata":"https://www.wikidata.org/wiki/Q1025017","display_name":"Cache coherence","level":5,"score":0.739371120929718},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.6570984721183777},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.5578373074531555},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.48986026644706726},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4896546006202698},{"id":"https://openalex.org/C49154492","wikidata":"https://www.wikidata.org/wiki/Q5300","display_name":"Central processing unit","level":2,"score":0.4623820185661316},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.43653735518455505},{"id":"https://openalex.org/C2779151265","wikidata":"https://www.wikidata.org/wiki/Q1156791","display_name":"Copying","level":2,"score":0.41490787267684937},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.294849693775177},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.26687008142471313},{"id":"https://openalex.org/C17744445","wikidata":"https://www.wikidata.org/wiki/Q36442","display_name":"Political science","level":0,"score":0.0},{"id":"https://openalex.org/C199539241","wikidata":"https://www.wikidata.org/wiki/Q7748","display_name":"Law","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/dac18074.2021.9586304","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dac18074.2021.9586304","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 58th ACM/IEEE Design Automation Conference (DAC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8999999761581421,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320317295","display_name":"Dipartimenti di Eccellenza","ror":null},{"id":"https://openalex.org/F4320321408","display_name":"Ministry of Education","ror":"https://ror.org/01p262204"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W645173616","https://openalex.org/W2015048865","https://openalex.org/W2314321304","https://openalex.org/W2326078278","https://openalex.org/W2535547924","https://openalex.org/W2623885517","https://openalex.org/W2626440223","https://openalex.org/W2740447511","https://openalex.org/W2740476521","https://openalex.org/W2914268292","https://openalex.org/W2948347424","https://openalex.org/W3017188964","https://openalex.org/W3040726395","https://openalex.org/W3092280560","https://openalex.org/W3102327032","https://openalex.org/W4287725993","https://openalex.org/W6759474395","https://openalex.org/W6780429346"],"related_works":["https://openalex.org/W2058965144","https://openalex.org/W3000570965","https://openalex.org/W2803934143","https://openalex.org/W2990378895","https://openalex.org/W2254409681","https://openalex.org/W1990975467","https://openalex.org/W2033171136","https://openalex.org/W1985687326","https://openalex.org/W3092369023","https://openalex.org/W4236831773"],"abstract_inverted_index":{"Many":[0],"modern":[1],"programmable":[2,161],"embedded":[3,162],"devices":[4,58],"contain":[5],"CPUs":[6],"and":[7,32,46,110],"a":[8,17,21,53,99,103,106,111,122,159],"GPU":[9,34],"that":[10],"share":[11],"the":[12,26,40,69,93,119,143,155],"same":[13],"system":[14],"memory":[15,23],"on":[16,89,102],"single":[18],"die.":[19],"Such":[20],"unified":[22,135],"architecture":[24],"allows":[25],"explicit":[27],"data":[28,86],"copying":[29],"between":[30],"CPU":[31],"integrated":[33],"(iGPU)":[35],"to":[36,50,76,116,152],"be":[37,146],"eliminated":[38],"with":[39,148],"benefit":[41],"of":[42,80,108],"significantly":[43],"improving":[44],"performance":[45,78,104],"energy":[47],"savings.":[48],"However,":[49],"enable":[51],"such":[52],"\u201czero-copy\u201d":[54],"communication":[55,114,130],"model,":[56,105],"many":[57],"either":[59],"implement":[60],"intricate":[61],"cache":[62],"coherence":[63],"protocols":[64],"or":[65,137],"they":[66],"may":[67,125],"disable":[68],"last":[70],"level":[71],"caches.":[72],"This":[73,96],"often":[74],"leads":[75],"strong":[77],"degradation":[79],"cache-dependent":[81],"applications,":[82],"for":[83,158],"which":[84],"CPU-iGPU":[85,123],"transfer":[87],"based":[88,101],"standard":[90,133,149],"copy":[91],"remains":[92],"best":[94],"solution.":[95],"paper":[97],"presents":[98],"framework":[100,144],"set":[107],"micro-benchmarks,":[109],"novel":[112],"zero-copy":[113],"pattern":[115],"accurately":[117],"estimate":[118],"potential":[120],"speedup":[121],"application":[124,156],"have":[126],"by":[127],"considering":[128],"different":[129],"models":[131],"(i.e.,":[132],"copy,":[134],"memory,":[136],"pinned":[138],"\u201czerocopy\u201d).":[139],"It":[140],"shows":[141],"how":[142],"can":[145],"combined":[147],"profiler":[150],"information":[151],"efficiently":[153],"drive":[154],"tuning":[157],"given":[160],"device.":[163]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":2}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}