{"id":"https://openalex.org/W3214701618","doi":"https://doi.org/10.1109/dac18074.2021.9586215","title":"Invited: Getting the Most out of your Circuits with Heterogeneous Logic Synthesis","display_name":"Invited: Getting the Most out of your Circuits with Heterogeneous Logic Synthesis","publication_year":2021,"publication_date":"2021-11-08","ids":{"openalex":"https://openalex.org/W3214701618","doi":"https://doi.org/10.1109/dac18074.2021.9586215","mag":"3214701618"},"language":"en","primary_location":{"id":"doi:10.1109/dac18074.2021.9586215","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dac18074.2021.9586215","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 58th ACM/IEEE Design Automation Conference (DAC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5015223583","display_name":"Scott Temple","orcid":"https://orcid.org/0000-0002-9977-5804"},"institutions":[{"id":"https://openalex.org/I223532165","display_name":"University of Utah","ror":"https://ror.org/03r0ha626","country_code":"US","type":"education","lineage":["https://openalex.org/I223532165"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Scott Temple","raw_affiliation_strings":["Electrical and Computer Engineering, University of Utah, Salt Lake City, Utah"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering, University of Utah, Salt Lake City, Utah","institution_ids":["https://openalex.org/I223532165"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5028824039","display_name":"Walter Lau Neto","orcid":"https://orcid.org/0000-0002-9349-4964"},"institutions":[{"id":"https://openalex.org/I223532165","display_name":"University of Utah","ror":"https://ror.org/03r0ha626","country_code":"US","type":"education","lineage":["https://openalex.org/I223532165"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Walter Lau Neto","raw_affiliation_strings":["Electrical and Computer Engineering, University of Utah, Salt Lake City, Utah"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering, University of Utah, Salt Lake City, Utah","institution_ids":["https://openalex.org/I223532165"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5079034834","display_name":"Ashton Snelgrove","orcid":"https://orcid.org/0000-0002-2062-2603"},"institutions":[{"id":"https://openalex.org/I223532165","display_name":"University of Utah","ror":"https://ror.org/03r0ha626","country_code":"US","type":"education","lineage":["https://openalex.org/I223532165"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ashton Snelgrove","raw_affiliation_strings":["Electrical and Computer Engineering, University of Utah, Salt Lake City, Utah"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering, University of Utah, Salt Lake City, Utah","institution_ids":["https://openalex.org/I223532165"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103004961","display_name":"Xifan Tang","orcid":"https://orcid.org/0000-0003-2203-3981"},"institutions":[{"id":"https://openalex.org/I223532165","display_name":"University of Utah","ror":"https://ror.org/03r0ha626","country_code":"US","type":"education","lineage":["https://openalex.org/I223532165"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Xifan Tang","raw_affiliation_strings":["Electrical and Computer Engineering, University of Utah, Salt Lake City, Utah"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering, University of Utah, Salt Lake City, Utah","institution_ids":["https://openalex.org/I223532165"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5002568331","display_name":"Pierre\u2010Emmanuel Gaillardon","orcid":"https://orcid.org/0000-0003-3634-3999"},"institutions":[{"id":"https://openalex.org/I223532165","display_name":"University of Utah","ror":"https://ror.org/03r0ha626","country_code":"US","type":"education","lineage":["https://openalex.org/I223532165"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Pierre-Emmanuel Gaillardon","raw_affiliation_strings":["Electrical and Computer Engineering, University of Utah, Salt Lake City, Utah"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering, University of Utah, Salt Lake City, Utah","institution_ids":["https://openalex.org/I223532165"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I223532165"],"apc_list":null,"apc_paid":null,"fwci":0.0983,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.44020863,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"1331","last_page":"1334"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7297767400741577},{"id":"https://openalex.org/keywords/electronic-design-automation","display_name":"Electronic design automation","score":0.5725986361503601},{"id":"https://openalex.org/keywords/workflow","display_name":"Workflow","score":0.5722022652626038},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.5351620316505432},{"id":"https://openalex.org/keywords/automation","display_name":"Automation","score":0.5184854865074158},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.5153605341911316},{"id":"https://openalex.org/keywords/pruning","display_name":"Pruning","score":0.5115004777908325},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.48562994599342346},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4846063554286957},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.480163037776947},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.445556640625},{"id":"https://openalex.org/keywords/suite","display_name":"Suite","score":0.4359845519065857},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.36229783296585083},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.3337101340293884},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.32052549719810486},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.22121953964233398},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.12082213163375854}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7297767400741577},{"id":"https://openalex.org/C64260653","wikidata":"https://www.wikidata.org/wiki/Q1194864","display_name":"Electronic design automation","level":2,"score":0.5725986361503601},{"id":"https://openalex.org/C177212765","wikidata":"https://www.wikidata.org/wiki/Q627335","display_name":"Workflow","level":2,"score":0.5722022652626038},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.5351620316505432},{"id":"https://openalex.org/C115901376","wikidata":"https://www.wikidata.org/wiki/Q184199","display_name":"Automation","level":2,"score":0.5184854865074158},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.5153605341911316},{"id":"https://openalex.org/C108010975","wikidata":"https://www.wikidata.org/wiki/Q500094","display_name":"Pruning","level":2,"score":0.5115004777908325},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.48562994599342346},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4846063554286957},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.480163037776947},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.445556640625},{"id":"https://openalex.org/C79581498","wikidata":"https://www.wikidata.org/wiki/Q1367530","display_name":"Suite","level":2,"score":0.4359845519065857},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.36229783296585083},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.3337101340293884},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.32052549719810486},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.22121953964233398},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.12082213163375854},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0},{"id":"https://openalex.org/C95457728","wikidata":"https://www.wikidata.org/wiki/Q309","display_name":"History","level":0,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0},{"id":"https://openalex.org/C6557445","wikidata":"https://www.wikidata.org/wiki/Q173113","display_name":"Agronomy","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C166957645","wikidata":"https://www.wikidata.org/wiki/Q23498","display_name":"Archaeology","level":1,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/dac18074.2021.9586215","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dac18074.2021.9586215","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 58th ACM/IEEE Design Automation Conference (DAC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9","score":0.550000011920929}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1599507069","https://openalex.org/W1995207020","https://openalex.org/W2140975144","https://openalex.org/W2800719180","https://openalex.org/W2946075680","https://openalex.org/W2946332877","https://openalex.org/W2963489471","https://openalex.org/W3035954817","https://openalex.org/W3036688246","https://openalex.org/W4299487805","https://openalex.org/W6635905713","https://openalex.org/W6750853391"],"related_works":["https://openalex.org/W2081132365","https://openalex.org/W2098419840","https://openalex.org/W1966764473","https://openalex.org/W1808014627","https://openalex.org/W1964556228","https://openalex.org/W2133239925","https://openalex.org/W2556823985","https://openalex.org/W2789349722","https://openalex.org/W4281558578","https://openalex.org/W1985308002"],"abstract_inverted_index":{"High":[0],"Level":[1],"Synthesis":[2],"(HLS)":[3],"speeds":[4],"hardware":[5],"development":[6],"and":[7,22,58,83,94,115,125,136],"opens":[8],"the":[9,67,113,129],"door":[10],"to":[11,62,144],"non-expert":[12],"designers,":[13],"focusing":[14],"on":[15,131],"functionality":[16],"rather":[17],"than":[18],"implementation.":[19],"The":[20,79],"expense":[21],"rigidity":[23],"of":[24,73,81,101,112,142],"commercial":[25],"electronic":[26],"design":[27],"automation":[28],"(EDA)":[29],"tool-chains":[30],"can":[31],"be":[32,100],"an":[33,40,110,117],"obstacle":[34],"for":[35,70,104],"these":[36],"users.":[37,106],"LSOracle":[38],"is":[39],"opensource":[41],"logic":[42],"synthesis":[43],"tool":[44],"which":[45,98],"leverages":[46],"multiple":[47],"underlying":[48],"data":[49],"structures,":[50],"including":[51],"and-inverter":[52],"graphs":[53,56,60],"(AIGs),":[54],"majority-inverter":[55],"(MIGs),":[57],"xor-and":[59],"(XAGs)":[61],"automatically":[63],"optimize":[64],"circuits":[65],"using":[66,122],"best":[68],"representation":[69],"each":[71],"region":[72],"a":[74,132,138],"design,":[75],"without":[76],"manual":[77],"intervention.":[78],"use":[80],"MIGs":[82],"XAGs":[84],"gives":[85],"particularly":[86],"strong":[87],"performance":[88],"in":[89,140],"arithmetic":[90],"logic,":[91],"cryptography":[92],"cores,":[93],"machine-learning":[95],"accelerators;":[96],"applications":[97],"may":[99],"particular":[102],"interest":[103],"HLS":[105],"Here":[107],"we":[108],"present":[109],"overview":[111],"approach":[114],"demonstrate":[116],"open-source":[118],"HLS-to-GDS":[119],"II":[120],"workflow":[121],"LSOracle,":[123],"Bambu,":[124],"OpenROAD.":[126],"We":[127],"test":[128],"integration":[130],"small":[133],"benchmark":[134],"suite":[135],"show":[137],"reduction":[139],"delay":[141],"up":[143],"31%.":[145]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2021,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}