{"id":"https://openalex.org/W3091980371","doi":"https://doi.org/10.1109/dac18072.2020.9218750","title":"An Efficient Critical Path Generation Algorithm Considering Extensive Path Constraints","display_name":"An Efficient Critical Path Generation Algorithm Considering Extensive Path Constraints","publication_year":2020,"publication_date":"2020-07-01","ids":{"openalex":"https://openalex.org/W3091980371","doi":"https://doi.org/10.1109/dac18072.2020.9218750","mag":"3091980371"},"language":"en","primary_location":{"id":"doi:10.1109/dac18072.2020.9218750","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dac18072.2020.9218750","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 57th ACM/IEEE Design Automation Conference (DAC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5056080873","display_name":"Guannan Guo","orcid":"https://orcid.org/0000-0003-1847-2068"},"institutions":[{"id":"https://openalex.org/I157725225","display_name":"University of Illinois Urbana-Champaign","ror":"https://ror.org/047426m28","country_code":"US","type":"education","lineage":["https://openalex.org/I157725225"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Guannan Guo","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Illinois at Urbana-Champaign, IL, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Illinois at Urbana-Champaign, IL, USA","institution_ids":["https://openalex.org/I157725225"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5088685794","display_name":"Tsung\u2010Wei Huang","orcid":"https://orcid.org/0000-0001-9768-3378"},"institutions":[{"id":"https://openalex.org/I223532165","display_name":"University of Utah","ror":"https://ror.org/03r0ha626","country_code":"US","type":"education","lineage":["https://openalex.org/I223532165"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Tsung-Wei Huang","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Utah, Salt Lake City, UT, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Utah, Salt Lake City, UT, USA","institution_ids":["https://openalex.org/I223532165"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5084483224","display_name":"Chun-Xun Lin","orcid":null},"institutions":[{"id":"https://openalex.org/I157725225","display_name":"University of Illinois Urbana-Champaign","ror":"https://ror.org/047426m28","country_code":"US","type":"education","lineage":["https://openalex.org/I157725225"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Chun-Xun Lin","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Illinois at Urbana-Champaign, IL, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Illinois at Urbana-Champaign, IL, USA","institution_ids":["https://openalex.org/I157725225"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5053378706","display_name":"Martin D. F. Wong","orcid":"https://orcid.org/0000-0001-8274-9688"},"institutions":[{"id":"https://openalex.org/I177725633","display_name":"Chinese University of Hong Kong","ror":"https://ror.org/00t33hh48","country_code":"CN","type":"education","lineage":["https://openalex.org/I177725633"]},{"id":"https://openalex.org/I157725225","display_name":"University of Illinois Urbana-Champaign","ror":"https://ror.org/047426m28","country_code":"US","type":"education","lineage":["https://openalex.org/I157725225"]}],"countries":["CN","US"],"is_corresponding":false,"raw_author_name":"Martin Wong","raw_affiliation_strings":["Department of Computer Science and Engineering, The Chinese University of Hong Kong, Shatin, NT, Hong Kong","Department of Electrical and Computer Engineering, University of Illinois at Urbana-Champaign, IL, USA"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, The Chinese University of Hong Kong, Shatin, NT, Hong Kong","institution_ids":["https://openalex.org/I177725633"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Illinois at Urbana-Champaign, IL, USA","institution_ids":["https://openalex.org/I157725225"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5056080873"],"corresponding_institution_ids":["https://openalex.org/I157725225"],"apc_list":null,"apc_paid":null,"fwci":0.9325,"has_fulltext":false,"cited_by_count":21,"citation_normalized_percentile":{"value":0.75077973,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/timer","display_name":"Timer","score":0.774838387966156},{"id":"https://openalex.org/keywords/path","display_name":"Path (computing)","score":0.7382362484931946},{"id":"https://openalex.org/keywords/critical-path-method","display_name":"Critical path method","score":0.6965879201889038},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.6656947731971741},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.580607533454895},{"id":"https://openalex.org/keywords/fast-path","display_name":"Fast path","score":0.498279333114624},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.48151978850364685},{"id":"https://openalex.org/keywords/graph","display_name":"Graph","score":0.41796618700027466},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.21351823210716248},{"id":"https://openalex.org/keywords/shortest-path-problem","display_name":"Shortest path problem","score":0.12377482652664185},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.09408321976661682}],"concepts":[{"id":"https://openalex.org/C2776633867","wikidata":"https://www.wikidata.org/wiki/Q186612","display_name":"Timer","level":3,"score":0.774838387966156},{"id":"https://openalex.org/C2777735758","wikidata":"https://www.wikidata.org/wiki/Q817765","display_name":"Path (computing)","level":2,"score":0.7382362484931946},{"id":"https://openalex.org/C115874739","wikidata":"https://www.wikidata.org/wiki/Q825377","display_name":"Critical path method","level":2,"score":0.6965879201889038},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.6656947731971741},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.580607533454895},{"id":"https://openalex.org/C32638748","wikidata":"https://www.wikidata.org/wiki/Q5437051","display_name":"Fast path","level":4,"score":0.498279333114624},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.48151978850364685},{"id":"https://openalex.org/C132525143","wikidata":"https://www.wikidata.org/wiki/Q141488","display_name":"Graph","level":2,"score":0.41796618700027466},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.21351823210716248},{"id":"https://openalex.org/C22590252","wikidata":"https://www.wikidata.org/wiki/Q1058754","display_name":"Shortest path problem","level":3,"score":0.12377482652664185},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.09408321976661682},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.0},{"id":"https://openalex.org/C173018170","wikidata":"https://www.wikidata.org/wiki/Q165678","display_name":"Microcontroller","level":2,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/dac18072.2020.9218750","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dac18072.2020.9218750","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 57th ACM/IEEE Design Automation Conference (DAC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.4300000071525574,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W658677875","https://openalex.org/W2060278032","https://openalex.org/W2064529033","https://openalex.org/W2248975694","https://openalex.org/W2345178427","https://openalex.org/W2789724425","https://openalex.org/W2946553399","https://openalex.org/W2963366311","https://openalex.org/W4237185564","https://openalex.org/W4248769596","https://openalex.org/W4252769808","https://openalex.org/W6622068049"],"related_works":["https://openalex.org/W2365007040","https://openalex.org/W2045633099","https://openalex.org/W1910575119","https://openalex.org/W2116465486","https://openalex.org/W830396839","https://openalex.org/W1970519101","https://openalex.org/W3196508834","https://openalex.org/W2171940562","https://openalex.org/W2101572961","https://openalex.org/W2490317825"],"abstract_inverted_index":{"In":[0],"this":[1],"paper,":[2],"we":[3],"introduce":[4],"a":[5,18,28,52,57,88,102],"fast":[6],"and":[7,38,66,74],"efficient":[8],"critical":[9,49],"path":[10,15,25],"generation":[11,26],"algorithm":[12,43,70,83],"considering":[13],"extensive":[14],"constraints":[16],"on":[17,51],"Static":[19],"Timing":[20],"Analysis":[21],"(STA)":[22],"graph.":[23],"Critical":[24],"is":[27,71],"key":[29],"routine":[30],"in":[31],"the":[32],"inner":[33],"loop":[34],"of":[35,48,59,111],"path-based":[36],"analysis":[37],"timing-driven":[39],"synthesis":[40],"flows.":[41],"Our":[42,69,97],"can":[44],"report":[45],"arbitrary":[46],"numbers":[47],"paths":[50],"logic":[53],"cone":[54],"constrained":[55],"by":[56,92],"sequence":[58],"from/through/to":[60],"pins":[61],"under":[62],"different":[63],"min/max":[64],"modes":[65],"rise/fall":[67],"transitions.":[68],"general,":[72],"efficient,":[73],"provably":[75],"good.":[76],"Experimental":[77],"results":[78,98],"have":[79],"showed":[80],"that":[81,86],"our":[82],"produces":[84],"reports":[85],"matches":[87],"golden":[89],"reference":[90],"generated":[91],"an":[93,109],"industrial":[94],"signoff":[95],"timer.":[96],"also":[99],"correlate":[100],"to":[101],"commercial":[103],"timer":[104],"yet":[105],"achieving":[106],"more":[107],"than":[108],"order":[110],"magnitude":[112],"speed-up.":[113]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":5},{"year":2024,"cited_by_count":6},{"year":2023,"cited_by_count":6},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":1}],"updated_date":"2026-03-04T09:10:02.777135","created_date":"2025-10-10T00:00:00"}