{"id":"https://openalex.org/W3092422274","doi":"https://doi.org/10.1109/dac18072.2020.9218723","title":"GUI-Enhanced Layout Generation of FFE SST TXs for Fast High-Speed Serial Link Design","display_name":"GUI-Enhanced Layout Generation of FFE SST TXs for Fast High-Speed Serial Link Design","publication_year":2020,"publication_date":"2020-07-01","ids":{"openalex":"https://openalex.org/W3092422274","doi":"https://doi.org/10.1109/dac18072.2020.9218723","mag":"3092422274"},"language":"en","primary_location":{"id":"doi:10.1109/dac18072.2020.9218723","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dac18072.2020.9218723","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 57th ACM/IEEE Design Automation Conference (DAC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5039660444","display_name":"Seungho Han","orcid":"https://orcid.org/0000-0002-6821-326X"},"institutions":[{"id":"https://openalex.org/I123900574","display_name":"Pohang University of Science and Technology","ror":"https://ror.org/04xysgw12","country_code":"KR","type":"education","lineage":["https://openalex.org/I123900574"]}],"countries":["KR"],"is_corresponding":true,"raw_author_name":"Seungho Han","raw_affiliation_strings":["Department of Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, Gyeongsangbukdo, Korea"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, Gyeongsangbukdo, Korea","institution_ids":["https://openalex.org/I123900574"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5077154789","display_name":"Sungyu Jeong","orcid":null},"institutions":[{"id":"https://openalex.org/I123900574","display_name":"Pohang University of Science and Technology","ror":"https://ror.org/04xysgw12","country_code":"KR","type":"education","lineage":["https://openalex.org/I123900574"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Sungyu Jeong","raw_affiliation_strings":["Department of Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, Gyeongsangbukdo, Korea"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, Gyeongsangbukdo, Korea","institution_ids":["https://openalex.org/I123900574"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5001029548","display_name":"Chanho Kim","orcid":"https://orcid.org/0000-0003-0146-1960"},"institutions":[{"id":"https://openalex.org/I123900574","display_name":"Pohang University of Science and Technology","ror":"https://ror.org/04xysgw12","country_code":"KR","type":"education","lineage":["https://openalex.org/I123900574"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Chanho Kim","raw_affiliation_strings":["Department of Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, Gyeongsangbukdo, Korea"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, Gyeongsangbukdo, Korea","institution_ids":["https://openalex.org/I123900574"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5057208951","display_name":"Hong-June Park","orcid":"https://orcid.org/0000-0001-8144-9165"},"institutions":[{"id":"https://openalex.org/I123900574","display_name":"Pohang University of Science and Technology","ror":"https://ror.org/04xysgw12","country_code":"KR","type":"education","lineage":["https://openalex.org/I123900574"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Hong-June Park","raw_affiliation_strings":["Department of Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, Gyeongsangbukdo, Korea"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, Gyeongsangbukdo, Korea","institution_ids":["https://openalex.org/I123900574"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5052722005","display_name":"Byungsub Kim","orcid":"https://orcid.org/0000-0003-1528-6235"},"institutions":[{"id":"https://openalex.org/I123900574","display_name":"Pohang University of Science and Technology","ror":"https://ror.org/04xysgw12","country_code":"KR","type":"education","lineage":["https://openalex.org/I123900574"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Byungsub Kim","raw_affiliation_strings":["Department of Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, Gyeongsangbukdo, Korea"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, Gyeongsangbukdo, Korea","institution_ids":["https://openalex.org/I123900574"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5039660444"],"corresponding_institution_ids":["https://openalex.org/I123900574"],"apc_list":null,"apc_paid":null,"fwci":0.7192,"has_fulltext":false,"cited_by_count":9,"citation_normalized_percentile":{"value":0.70743301,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.996999979019165,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7309417128562927},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6871631145477295},{"id":"https://openalex.org/keywords/generator","display_name":"Generator (circuit theory)","score":0.5484243035316467},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.5393969416618347},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4883091449737549},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.4722898602485657},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4429513216018677},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.396908164024353},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.38693922758102417},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.346704363822937},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.21983188390731812},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.19095158576965332}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7309417128562927},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6871631145477295},{"id":"https://openalex.org/C2780992000","wikidata":"https://www.wikidata.org/wiki/Q17016113","display_name":"Generator (circuit theory)","level":3,"score":0.5484243035316467},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.5393969416618347},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4883091449737549},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.4722898602485657},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4429513216018677},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.396908164024353},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.38693922758102417},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.346704363822937},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.21983188390731812},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.19095158576965332},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/dac18072.2020.9218723","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dac18072.2020.9218723","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 57th ACM/IEEE Design Automation Conference (DAC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.5799999833106995,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W2055606474","https://openalex.org/W2132607299","https://openalex.org/W2136801359","https://openalex.org/W2176101535","https://openalex.org/W2550327407","https://openalex.org/W2728352738","https://openalex.org/W2936251061","https://openalex.org/W4232735308","https://openalex.org/W4236728296"],"related_works":["https://openalex.org/W3014521742","https://openalex.org/W2617868873","https://openalex.org/W3204141294","https://openalex.org/W4386230336","https://openalex.org/W4306968100","https://openalex.org/W2171986175","https://openalex.org/W2089791793","https://openalex.org/W2038858740","https://openalex.org/W1491218245","https://openalex.org/W2046435967"],"abstract_inverted_index":{"We":[0],"present":[1],"the":[2,31,89,93],"first":[3,32,94],"FFE":[4],"SST":[5],"TX":[6,72],"layout":[7],"generator":[8,91],"enhanced":[9],"by":[10,63,88],"various":[11],"software":[12],"techniques":[13],"including":[14,59],"a":[15,64],"GUI-based":[16],"template":[17],"engine.":[18],"Seven":[19],"different":[20],"DRC/LVS-clean":[21],"TXs":[22],"were":[23],"generated":[24],"in":[25,43,49],"multiple":[26],"technologies":[27],"(40nm/65nm/90nm":[28],"CMOS)":[29],"for":[30,71,76,92],"time,":[33],"and":[34,67],"achieved":[35],"adequate":[36],"maximum":[37],"data":[38],"rates:":[39],"36Gb/s":[40],"with":[41,47],"40nm":[42],"post-layout":[44,80],"simulation;":[45],"14Gb/s":[46],"65nm":[48],"measurement.":[50],"Total":[51],"generation":[52],"time":[53],"was":[54,86],"less":[55],"than":[56],"5":[57],"days,":[58],"iterative":[60],"parameter":[61],"tuning":[62],"human":[65],"designer":[66],"computation":[68],"(30":[69],"minutes":[70],"core,":[73],"8":[74],"hours":[75],"power":[77],"network).":[78],"Fast":[79],"analysis":[81],"of":[82],"TX\u2019s":[83],"performance-power":[84],"trade-off":[85],"enabled":[87],"presented":[90],"time.":[95]},"counts_by_year":[{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
