{"id":"https://openalex.org/W3092226368","doi":"https://doi.org/10.1109/dac18072.2020.9218539","title":"Kite: A Family of Heterogeneous Interposer Topologies Enabled via Accurate Interconnect Modeling","display_name":"Kite: A Family of Heterogeneous Interposer Topologies Enabled via Accurate Interconnect Modeling","publication_year":2020,"publication_date":"2020-07-01","ids":{"openalex":"https://openalex.org/W3092226368","doi":"https://doi.org/10.1109/dac18072.2020.9218539","mag":"3092226368"},"language":"en","primary_location":{"id":"doi:10.1109/dac18072.2020.9218539","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dac18072.2020.9218539","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 57th ACM/IEEE Design Automation Conference (DAC)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5089179434","display_name":"Srikant Bharadwaj","orcid":"https://orcid.org/0000-0002-0422-5210"},"institutions":[{"id":"https://openalex.org/I1311921367","display_name":"Advanced Micro Devices (Canada)","ror":"https://ror.org/02yh0k313","country_code":"CA","type":"company","lineage":["https://openalex.org/I1311921367","https://openalex.org/I4210137977"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Srikant Bharadwaj","raw_affiliation_strings":["Advanced Micro Devices, Inc"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Advanced Micro Devices, Inc","institution_ids":["https://openalex.org/I1311921367"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5082725592","display_name":"Jieming Yin","orcid":"https://orcid.org/0009-0008-2878-1853"},"institutions":[{"id":"https://openalex.org/I1311921367","display_name":"Advanced Micro Devices (Canada)","ror":"https://ror.org/02yh0k313","country_code":"CA","type":"company","lineage":["https://openalex.org/I1311921367","https://openalex.org/I4210137977"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Jieming Yin","raw_affiliation_strings":["Advanced Micro Devices, Inc"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Advanced Micro Devices, Inc","institution_ids":["https://openalex.org/I1311921367"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5077056823","display_name":"Bradford M. Beckmann","orcid":"https://orcid.org/0000-0002-5444-6521"},"institutions":[{"id":"https://openalex.org/I1311921367","display_name":"Advanced Micro Devices (Canada)","ror":"https://ror.org/02yh0k313","country_code":"CA","type":"company","lineage":["https://openalex.org/I1311921367","https://openalex.org/I4210137977"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Bradford Beckmann","raw_affiliation_strings":["Advanced Micro Devices, Inc"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Advanced Micro Devices, Inc","institution_ids":["https://openalex.org/I1311921367"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5034089074","display_name":"Tushar Krishna","orcid":"https://orcid.org/0000-0001-5738-6942"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Tushar Krishna","raw_affiliation_strings":["Georgia Institute of Technology"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Georgia Institute of Technology","institution_ids":["https://openalex.org/I130701444"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":83,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/network-topology","display_name":"Network topology","score":0.8642295598983765},{"id":"https://openalex.org/keywords/interposer","display_name":"Interposer","score":0.8194971084594727},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.6894048452377319},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6531324982643127},{"id":"https://openalex.org/keywords/network-on-a-chip","display_name":"Network on a chip","score":0.5598698854446411},{"id":"https://openalex.org/keywords/kite","display_name":"Kite","score":0.5000414848327637},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.4704664647579193},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.46147677302360535},{"id":"https://openalex.org/keywords/three-dimensional-integrated-circuit","display_name":"Three-dimensional integrated circuit","score":0.4128502905368805},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.39634355902671814},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.37129801511764526},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.34952861070632935},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2649678587913513},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.19963160157203674},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.16279098391532898},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.09328705072402954}],"concepts":[{"id":"https://openalex.org/C199845137","wikidata":"https://www.wikidata.org/wiki/Q145490","display_name":"Network topology","level":2,"score":0.8642295598983765},{"id":"https://openalex.org/C158802814","wikidata":"https://www.wikidata.org/wiki/Q6056418","display_name":"Interposer","level":4,"score":0.8194971084594727},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.6894048452377319},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6531324982643127},{"id":"https://openalex.org/C128519102","wikidata":"https://www.wikidata.org/wiki/Q339554","display_name":"Network on a chip","level":2,"score":0.5598698854446411},{"id":"https://openalex.org/C2777229633","wikidata":"https://www.wikidata.org/wiki/Q107061","display_name":"Kite","level":2,"score":0.5000414848327637},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.4704664647579193},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.46147677302360535},{"id":"https://openalex.org/C59088047","wikidata":"https://www.wikidata.org/wiki/Q229370","display_name":"Three-dimensional integrated circuit","level":3,"score":0.4128502905368805},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.39634355902671814},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.37129801511764526},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.34952861070632935},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2649678587913513},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.19963160157203674},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.16279098391532898},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.09328705072402954},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C2779227376","wikidata":"https://www.wikidata.org/wiki/Q6505497","display_name":"Layer (electronics)","level":2,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C159985019","wikidata":"https://www.wikidata.org/wiki/Q181790","display_name":"Composite material","level":1,"score":0.0},{"id":"https://openalex.org/C100460472","wikidata":"https://www.wikidata.org/wiki/Q2368605","display_name":"Etching (microfabrication)","level":3,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/dac18072.2020.9218539","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dac18072.2020.9218539","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 57th ACM/IEEE Design Automation Conference (DAC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.5899999737739563,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W1985818188","https://openalex.org/W1997664981","https://openalex.org/W2014555481","https://openalex.org/W2038423000","https://openalex.org/W2066162922","https://openalex.org/W2080592089","https://openalex.org/W2118231264","https://openalex.org/W2128402381","https://openalex.org/W2147657366","https://openalex.org/W2155597158","https://openalex.org/W2157225945","https://openalex.org/W2337228275","https://openalex.org/W2521708680","https://openalex.org/W2625200202","https://openalex.org/W2700369620","https://openalex.org/W2787181861","https://openalex.org/W2791952321","https://openalex.org/W2807615772","https://openalex.org/W2884166449"],"related_works":["https://openalex.org/W2011182927","https://openalex.org/W2310189477","https://openalex.org/W1990828594","https://openalex.org/W2333804548","https://openalex.org/W2528892790","https://openalex.org/W2117988687","https://openalex.org/W2042694550","https://openalex.org/W2543304869","https://openalex.org/W2088407355","https://openalex.org/W2002219888"],"abstract_inverted_index":{"Recent":[0],"advances":[1],"in":[2,85],"die-stacking":[3],"and":[4,64,81,89,103,115],"2.5D":[5],"chip":[6],"integration":[7],"technologies":[8],"introduce":[9],"in-package":[10],"network":[11],"heterogeneities":[12],"that":[13],"can":[14],"complicate":[15],"the":[16,35,42,46,58,78,91,105],"interconnect":[17],"design.":[18],"Integrating":[19],"chiplets":[20],"over":[21],"a":[22,66],"silicon":[23],"interposer":[24,30,87],"offers":[25],"new":[26,67,86],"opportunities":[27],"of":[28,37,45,60,69],"optimizing":[29],"topologies.":[31],"However,":[32],"limited":[33],"by":[34,101,108],"capability":[36],"existing":[38,84],"network-on-chip":[39],"(NoC)":[40],"simulators,":[41],"full":[43],"potential":[44],"interposer-based":[47],"NoCs":[48],"has":[49],"not":[50],"been":[51],"exploited.":[52],"In":[53],"this":[54],"paper,":[55],"we":[56],"address":[57],"shortfalls":[59],"prior":[61,92],"NoC":[62],"designs":[63],"present":[65],"family":[68],"chiplet":[70,93],"topologies":[71,75],"called":[72],"Kite.":[73],"Kite":[74,96],"better":[76],"utilize":[77],"diverse":[79],"networking":[80],"frequency":[82],"domains":[83],"systems":[88],"outperform":[90],"topology":[94],"proposals.":[95],"decreased":[97],"synthetic":[98],"traffic":[99],"latency":[100],"7%":[102],"improved":[104],"maximum":[106],"throughput":[107],"17%":[109],"on":[110],"average":[111],"versus":[112],"Double":[113],"Butterfly":[114],"Butter":[116],"Donut,":[117],"two":[118],"previous":[119],"proposals":[120],"developed":[121],"using":[122],"less":[123],"accurate":[124],"modeling.":[125]},"counts_by_year":[{"year":2026,"cited_by_count":7},{"year":2025,"cited_by_count":29},{"year":2024,"cited_by_count":18},{"year":2023,"cited_by_count":13},{"year":2022,"cited_by_count":9},{"year":2021,"cited_by_count":5},{"year":2020,"cited_by_count":2}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
