{"id":"https://openalex.org/W4280617109","doi":"https://doi.org/10.1109/coolchips54332.2022.9772671","title":"Encoder-based Many-Pattern Matching on FPGAs","display_name":"Encoder-based Many-Pattern Matching on FPGAs","publication_year":2022,"publication_date":"2022-04-20","ids":{"openalex":"https://openalex.org/W4280617109","doi":"https://doi.org/10.1109/coolchips54332.2022.9772671"},"language":"en","primary_location":{"id":"doi:10.1109/coolchips54332.2022.9772671","is_oa":false,"landing_page_url":"https://doi.org/10.1109/coolchips54332.2022.9772671","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5029416098","display_name":"Hoang-Gia Vu","orcid":"https://orcid.org/0000-0002-5006-1894"},"institutions":[{"id":"https://openalex.org/I131359167","display_name":"Le Quy Don Technical University","ror":"https://ror.org/04wgyjv21","country_code":"VN","type":"education","lineage":["https://openalex.org/I131359167"]}],"countries":["VN"],"is_corresponding":false,"raw_author_name":"Hoang-Gia Vu","raw_affiliation_strings":["Le Quy Don Technical University,Faculty of Radio-Electronic Engineering,Ha Noi,Vietnam","Faculty of Radio-Electronic Engineering, Le Quy Don Technical University, Ha Noi, Vietnam"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Le Quy Don Technical University,Faculty of Radio-Electronic Engineering,Ha Noi,Vietnam","institution_ids":["https://openalex.org/I131359167"]},{"raw_affiliation_string":"Faculty of Radio-Electronic Engineering, Le Quy Don Technical University, Ha Noi, Vietnam","institution_ids":["https://openalex.org/I131359167"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5044478809","display_name":"Ngoc-Dai Bui","orcid":null},"institutions":[{"id":"https://openalex.org/I131359167","display_name":"Le Quy Don Technical University","ror":"https://ror.org/04wgyjv21","country_code":"VN","type":"education","lineage":["https://openalex.org/I131359167"]}],"countries":["VN"],"is_corresponding":false,"raw_author_name":"Ngoc-Dai Bui","raw_affiliation_strings":["Le Quy Don Technical University,Faculty of Radio-Electronic Engineering,Ha Noi,Vietnam","Faculty of Radio-Electronic Engineering, Le Quy Don Technical University, Ha Noi, Vietnam"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Le Quy Don Technical University,Faculty of Radio-Electronic Engineering,Ha Noi,Vietnam","institution_ids":["https://openalex.org/I131359167"]},{"raw_affiliation_string":"Faculty of Radio-Electronic Engineering, Le Quy Don Technical University, Ha Noi, Vietnam","institution_ids":["https://openalex.org/I131359167"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I131359167"],"apc_list":null,"apc_paid":null,"fwci":0.2319,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.33441654,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"37","issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11269","display_name":"Algorithms and Data Compression","score":0.9905999898910522,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10526","display_name":"HIV/AIDS drug development and treatment","score":0.9671000242233276,"subfield":{"id":"https://openalex.org/subfields/2725","display_name":"Infectious Diseases"},"field":{"id":"https://openalex.org/fields/27","display_name":"Medicine"},"domain":{"id":"https://openalex.org/domains/4","display_name":"Health Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8187642097473145},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7713165879249573},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.6979562044143677},{"id":"https://openalex.org/keywords/encoder","display_name":"Encoder","score":0.6343739032745361},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.6143608093261719},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.5740489959716797},{"id":"https://openalex.org/keywords/pattern-matching","display_name":"Pattern matching","score":0.524789035320282},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.4862607717514038},{"id":"https://openalex.org/keywords/hardware-architecture","display_name":"Hardware architecture","score":0.4449039101600647},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.4353444278240204},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4122842848300934},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3885994553565979},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.09178534150123596},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.08574873208999634},{"id":"https://openalex.org/keywords/wireless","display_name":"Wireless","score":0.07512426376342773},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.07388496398925781}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8187642097473145},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7713165879249573},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.6979562044143677},{"id":"https://openalex.org/C118505674","wikidata":"https://www.wikidata.org/wiki/Q42586063","display_name":"Encoder","level":2,"score":0.6343739032745361},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.6143608093261719},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.5740489959716797},{"id":"https://openalex.org/C68859911","wikidata":"https://www.wikidata.org/wiki/Q1503724","display_name":"Pattern matching","level":2,"score":0.524789035320282},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.4862607717514038},{"id":"https://openalex.org/C65232700","wikidata":"https://www.wikidata.org/wiki/Q5656403","display_name":"Hardware architecture","level":3,"score":0.4449039101600647},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.4353444278240204},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4122842848300934},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3885994553565979},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.09178534150123596},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.08574873208999634},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.07512426376342773},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.07388496398925781},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/coolchips54332.2022.9772671","is_oa":false,"landing_page_url":"https://doi.org/10.1109/coolchips54332.2022.9772671","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.4300000071525574,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":23,"referenced_works":["https://openalex.org/W1655192411","https://openalex.org/W1707172707","https://openalex.org/W1960511147","https://openalex.org/W2018094844","https://openalex.org/W2053554067","https://openalex.org/W2107120478","https://openalex.org/W2108254684","https://openalex.org/W2137001401","https://openalex.org/W2153102141","https://openalex.org/W2159426028","https://openalex.org/W2170113025","https://openalex.org/W2474119684","https://openalex.org/W2492686975","https://openalex.org/W2542250562","https://openalex.org/W2583220202","https://openalex.org/W2593716495","https://openalex.org/W2758109413","https://openalex.org/W2794764397","https://openalex.org/W2947287917","https://openalex.org/W3016023409","https://openalex.org/W4235641964","https://openalex.org/W6637452973","https://openalex.org/W6720547715"],"related_works":["https://openalex.org/W2111241003","https://openalex.org/W2355315220","https://openalex.org/W4200391368","https://openalex.org/W2210979487","https://openalex.org/W2074043759","https://openalex.org/W2316202402","https://openalex.org/W2082487009","https://openalex.org/W2373535795","https://openalex.org/W2364622490","https://openalex.org/W2281932057"],"abstract_inverted_index":{"Many-pattern":[0],"matching":[1,27,78,82,90,128],"is":[2,113],"one":[3],"of":[4,33,46,58,101,118,171],"the":[5,31,34,56,63,99,102,107,116,121,154,180,185],"most":[6],"essential":[7],"algorithms":[8],"in":[9],"many":[10],"application":[11,23],"domains,":[12],"such":[13,39],"as":[14,60,62],"data":[15,64,123],"mining,":[16],"network":[17],"security,":[18],"and":[19,89,120,130,174,184,190],"bioinformatics.":[20],"Such":[21],"high-throughput":[22],"domains":[24],"require":[25],"high-performance":[26],"engines,":[28],"leading":[29],"to":[30,97],"deployment":[32,41],"algorithm":[35,96,132],"on":[36,79,145],"hardware.":[37],"However,":[38],"hardware":[40,47,74,108,111,159],"consumes":[42],"a":[43,166],"large":[44],"number":[45,57,117],"resources.":[48],"This":[49],"challenge":[50],"becomes":[51],"more":[52],"critical":[53],"when":[54],"scaling":[55],"patterns":[59,119,136],"well":[61],"throughput.":[65,124],"In":[66],"this":[67],"paper,":[68],"we":[69],"first":[70],"proposed":[71,94,155],"an":[72,95],"encoder-based":[73,87,103],"architecture":[75,83,112,129,156],"for":[76,141],"many-pattern":[77],"FPGAs.":[80],"The":[81,110,143],"includes":[84],"two":[85],"parts:":[86],"filter":[88],"block.":[91],"We":[92,125],"also":[93],"simplify":[98],"structure":[100],"filter,":[104],"thus":[105],"reducing":[106],"utilization.":[109],"scalable":[114],"with":[115,133],"input":[122],"evaluated":[126],"our":[127,131],"2048":[134],"32-byte":[135],"abstracted":[137],"from":[138],"Snort":[139],"rules":[140],"malware.":[142],"evaluation":[144],"Xilinx":[146],"Zedboard":[147],"shows":[148],"that":[149],"at":[150,161],"2.16":[151],"Gbps":[152],"throughput,":[153],"achieves":[157],"higher":[158],"efficiency":[160],"0.05":[162],"LUTs":[163],"per":[164],"character,":[165],"block":[167],"RAM":[168],"consumption":[169],"10%":[170],"total":[172],"device,":[173],"almost":[175],"no":[176],"flip-flop":[177],"consumption,":[178],"while":[179],"maximum":[181],"clock":[182],"frequency":[183],"latency":[186],"are":[187],"270":[188],"MHz":[189],"11":[191],"ns,":[192],"respectively.":[193]},"counts_by_year":[{"year":2022,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
