{"id":"https://openalex.org/W3026394890","doi":"https://doi.org/10.1109/coolchips49199.2020.9097642","title":"A Novel In-DRAM Accelerator Architecture for Binary Neural Network","display_name":"A Novel In-DRAM Accelerator Architecture for Binary Neural Network","publication_year":2020,"publication_date":"2020-04-01","ids":{"openalex":"https://openalex.org/W3026394890","doi":"https://doi.org/10.1109/coolchips49199.2020.9097642","mag":"3026394890"},"language":"en","primary_location":{"id":"doi:10.1109/coolchips49199.2020.9097642","is_oa":false,"landing_page_url":"https://doi.org/10.1109/coolchips49199.2020.9097642","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5035766461","display_name":"Haerang Choi","orcid":"https://orcid.org/0000-0002-8933-6226"},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":true,"raw_author_name":"Haerang Choi","raw_affiliation_strings":["Dept. of Computer Science and Engineering, Seoul National University, Seoul, Republic of Korea"],"affiliations":[{"raw_affiliation_string":"Dept. of Computer Science and Engineering, Seoul National University, Seoul, Republic of Korea","institution_ids":["https://openalex.org/I139264467"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5072180895","display_name":"Yosep Lee","orcid":null},"institutions":[{"id":"https://openalex.org/I134353371","display_name":"SK Group (South Korea)","ror":"https://ror.org/03696td91","country_code":"KR","type":"company","lineage":["https://openalex.org/I134353371"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Yosep Lee","raw_affiliation_strings":["DRAM Development Division, SK Hynix, Icheon, Republic of Korea"],"affiliations":[{"raw_affiliation_string":"DRAM Development Division, SK Hynix, Icheon, Republic of Korea","institution_ids":["https://openalex.org/I134353371"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5003219699","display_name":"Jae\u2010Joon Kim","orcid":"https://orcid.org/0000-0001-5175-8258"},"institutions":[{"id":"https://openalex.org/I123900574","display_name":"Pohang University of Science and Technology","ror":"https://ror.org/04xysgw12","country_code":"KR","type":"education","lineage":["https://openalex.org/I123900574"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Jae-Joon Kim","raw_affiliation_strings":["Dept. of Creative IT Engineering, POSTECH, Pohang, Republic of Korea"],"affiliations":[{"raw_affiliation_string":"Dept. of Creative IT Engineering, POSTECH, Pohang, Republic of Korea","institution_ids":["https://openalex.org/I123900574"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5063521444","display_name":"Sungjoo Yoo","orcid":"https://orcid.org/0000-0002-5853-0675"},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Sungjoo Yoo","raw_affiliation_strings":["Dept. of Computer Science and Engineering, Seoul National University, Seoul, Republic of Korea"],"affiliations":[{"raw_affiliation_string":"Dept. of Computer Science and Engineering, Seoul National University, Seoul, Republic of Korea","institution_ids":["https://openalex.org/I139264467"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5035766461"],"corresponding_institution_ids":["https://openalex.org/I139264467"],"apc_list":null,"apc_paid":null,"fwci":0.3119,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.56213212,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.9278361201286316},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7487802505493164},{"id":"https://openalex.org/keywords/cas-latency","display_name":"CAS latency","score":0.6292291879653931},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.5356615781784058},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.515556812286377},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4885050058364868},{"id":"https://openalex.org/keywords/binary-number","display_name":"Binary number","score":0.4783722460269928},{"id":"https://openalex.org/keywords/memory-architecture","display_name":"Memory architecture","score":0.4705657660961151},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.43461620807647705},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.43120497465133667},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.426051527261734},{"id":"https://openalex.org/keywords/memory-controller","display_name":"Memory controller","score":0.25685039162635803},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.16454699635505676},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.07975360751152039},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.07322525978088379}],"concepts":[{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.9278361201286316},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7487802505493164},{"id":"https://openalex.org/C189930140","wikidata":"https://www.wikidata.org/wiki/Q1112878","display_name":"CAS latency","level":4,"score":0.6292291879653931},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.5356615781784058},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.515556812286377},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4885050058364868},{"id":"https://openalex.org/C48372109","wikidata":"https://www.wikidata.org/wiki/Q3913","display_name":"Binary number","level":2,"score":0.4783722460269928},{"id":"https://openalex.org/C2779602883","wikidata":"https://www.wikidata.org/wiki/Q15544750","display_name":"Memory architecture","level":2,"score":0.4705657660961151},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.43461620807647705},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.43120497465133667},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.426051527261734},{"id":"https://openalex.org/C100800780","wikidata":"https://www.wikidata.org/wiki/Q1175867","display_name":"Memory controller","level":3,"score":0.25685039162635803},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.16454699635505676},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.07975360751152039},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.07322525978088379},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/coolchips49199.2020.9097642","is_oa":false,"landing_page_url":"https://doi.org/10.1109/coolchips49199.2020.9097642","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS)","raw_type":"proceedings-article"},{"id":"pmh:oai:oasis.postech.ac.kr:2014.oak/106266","is_oa":false,"landing_page_url":"https://oasis.postech.ac.kr/handle/2014.oak/106266","pdf_url":null,"source":{"id":"https://openalex.org/S4306401965","display_name":"Open Access System for Information Sharing (Pohang University of Science and Technology)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I123900574","host_organization_name":"Pohang University of Science and Technology","host_organization_lineage":["https://openalex.org/I123900574"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Conference"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.9100000262260437,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":3,"referenced_works":["https://openalex.org/W1999085092","https://openalex.org/W2765234579","https://openalex.org/W2766489088"],"related_works":["https://openalex.org/W4293430534","https://openalex.org/W2342813629","https://openalex.org/W3150934690","https://openalex.org/W2335743642","https://openalex.org/W4297812927","https://openalex.org/W2800412005","https://openalex.org/W1976244802","https://openalex.org/W1992487929","https://openalex.org/W2083934844","https://openalex.org/W2800626838"],"abstract_inverted_index":{"We":[0],"propose":[1],"a":[2,16,33,91],"novel":[3,17],"computation-in-memory":[4],"(CIM)":[5],"architecture":[6],"based":[7],"on":[8,53,62],"DRAM":[9,47],"for":[10,56],"binary":[11],"neural":[12],"network,":[13],"in":[14,78],"which":[15],"charge":[18],"sharing":[19],"circuit":[20],"enables":[21],"us":[22],"to":[23],"perform":[24],"all":[25],"logic":[26],"operations":[27],"and":[28,72,88],"accumulation":[29,42],"inside":[30],"sub-array":[31],"at":[32,90],"very":[34,92],"small":[35,93],"area":[36],"overhead":[37],"(1.22%).":[38],"Especially,":[39],"the":[40,83],"in-DRAM":[41],"can":[43],"significantly":[44],"reduce":[45],"off-chip":[46,79],"accesses.":[48],"Our":[49],"experiments":[50],"show":[51],"that,":[52],"VGG-9":[54],"model":[55],"CIFAR-10,":[57],"our":[58],"proposed":[59],"method,":[60],"realized":[61],"DDR4":[63],"DRAM,":[64],"gives":[65],"2.56":[66],"times":[67,74],"smaller":[68],"latency":[69],"per":[70],"image":[71],"19.57":[73],"lower":[75],"energy":[76],"consumption":[77],"data":[80],"transfer":[81],"than":[82],"existing":[84],"methods,":[85],"modified":[86],"Ambit":[87],"DRISA,":[89],"accuracy":[94],"loss":[95],"(0.23%).":[96]},"counts_by_year":[{"year":2024,"cited_by_count":3},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":2}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}
