{"id":"https://openalex.org/W3028243738","doi":"https://doi.org/10.1109/coolchips49199.2020.9097634","title":"A 0.4-0.9V, 2.87pJ/cycle Near-Threshold ARM Cortex-M3 CPU with In-Situ Monitoring and Adaptive-Logic Scan","display_name":"A 0.4-0.9V, 2.87pJ/cycle Near-Threshold ARM Cortex-M3 CPU with In-Situ Monitoring and Adaptive-Logic Scan","publication_year":2020,"publication_date":"2020-04-01","ids":{"openalex":"https://openalex.org/W3028243738","doi":"https://doi.org/10.1109/coolchips49199.2020.9097634","mag":"3028243738"},"language":"en","primary_location":{"id":"doi:10.1109/coolchips49199.2020.9097634","is_oa":false,"landing_page_url":"https://doi.org/10.1109/coolchips49199.2020.9097634","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5054816488","display_name":"Markus Hiienkari","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Markus Hiienkari","raw_affiliation_strings":["Minima Processor, Oulu, Finland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Minima Processor, Oulu, Finland","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101474025","display_name":"Navneet Gupta","orcid":"https://orcid.org/0000-0002-1367-9863"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Navneet Gupta","raw_affiliation_strings":["Minima Processor, Oulu, Finland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Minima Processor, Oulu, Finland","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5033769588","display_name":"Jukka Teittinen","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Jukka Teittinen","raw_affiliation_strings":["Minima Processor, Oulu, Finland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Minima Processor, Oulu, Finland","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5048563684","display_name":"Jesse Simonsson","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Jesse Simonsson","raw_affiliation_strings":["Minima Processor, Oulu, Finland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Minima Processor, Oulu, Finland","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5030388052","display_name":"Matthew Turnquist","orcid":"https://orcid.org/0000-0002-6596-7218"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Matthew Turnquist","raw_affiliation_strings":["Minima Processor, Oulu, Finland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Minima Processor, Oulu, Finland","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5027385369","display_name":"Jonas Eriksson","orcid":"https://orcid.org/0000-0003-0241-092X"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Jonas Eriksson","raw_affiliation_strings":["Minima Processor, Oulu, Finland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Minima Processor, Oulu, Finland","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078411570","display_name":"Risto Anttila","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Risto Anttila","raw_affiliation_strings":["Minima Processor, Oulu, Finland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Minima Processor, Oulu, Finland","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5001786831","display_name":"Ohto Myllynen","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Ohto Myllynen","raw_affiliation_strings":["Minima Processor, Oulu, Finland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Minima Processor, Oulu, Finland","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5041763143","display_name":"Hannu Ramakko","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Hannu Ramakko","raw_affiliation_strings":["Minima Processor, Oulu, Finland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Minima Processor, Oulu, Finland","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5033499601","display_name":"Sofia Makikyro","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Sofia Makikyro","raw_affiliation_strings":["Minima Processor, Oulu, Finland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Minima Processor, Oulu, Finland","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5065136207","display_name":"Lauri Koskinen","orcid":"https://orcid.org/0009-0009-3737-3912"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Lauri Koskinen","raw_affiliation_strings":["Minima Processor, Oulu, Finland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Minima Processor, Oulu, Finland","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":11,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.4162,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.80264826,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"3"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9973999857902527,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9973999857902527,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9902999997138977,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10320","display_name":"Neural Networks and Applications","score":0.9883000254631042,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6151876449584961},{"id":"https://openalex.org/keywords/microcontroller","display_name":"Microcontroller","score":0.5589576363563538},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5477960109710693},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.5154017210006714},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4884590208530426},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.47348272800445557},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.47228318452835083},{"id":"https://openalex.org/keywords/flip-flop","display_name":"Flip-flop","score":0.44499504566192627},{"id":"https://openalex.org/keywords/central-processing-unit","display_name":"Central processing unit","score":0.4258376955986023},{"id":"https://openalex.org/keywords/non-volatile-memory","display_name":"Non-volatile memory","score":0.4150921702384949},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.41201138496398926},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3143458366394043},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2477579116821289},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.2020730972290039},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.141958087682724}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6151876449584961},{"id":"https://openalex.org/C173018170","wikidata":"https://www.wikidata.org/wiki/Q165678","display_name":"Microcontroller","level":2,"score":0.5589576363563538},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5477960109710693},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.5154017210006714},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4884590208530426},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.47348272800445557},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.47228318452835083},{"id":"https://openalex.org/C2781007278","wikidata":"https://www.wikidata.org/wiki/Q183406","display_name":"Flip-flop","level":3,"score":0.44499504566192627},{"id":"https://openalex.org/C49154492","wikidata":"https://www.wikidata.org/wiki/Q5300","display_name":"Central processing unit","level":2,"score":0.4258376955986023},{"id":"https://openalex.org/C177950962","wikidata":"https://www.wikidata.org/wiki/Q10997658","display_name":"Non-volatile memory","level":2,"score":0.4150921702384949},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.41201138496398926},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3143458366394043},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2477579116821289},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.2020730972290039},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.141958087682724},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/coolchips49199.2020.9097634","is_oa":false,"landing_page_url":"https://doi.org/10.1109/coolchips49199.2020.9097634","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8999999761581421}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W1529746645","https://openalex.org/W2525905199","https://openalex.org/W2744562181","https://openalex.org/W2769912137","https://openalex.org/W6742983694","https://openalex.org/W6746451879"],"related_works":["https://openalex.org/W2132046218","https://openalex.org/W2783525109","https://openalex.org/W4402040071","https://openalex.org/W4230846245","https://openalex.org/W2763646728","https://openalex.org/W2793507197","https://openalex.org/W4206433830","https://openalex.org/W4300456897","https://openalex.org/W4399342136","https://openalex.org/W2611474147"],"abstract_inverted_index":{"The":[0],"following":[1],"topics":[2],"are":[3],"dealt":[4],"with:":[5],"low-power":[6],"electronics;":[7],"microcontrollers;":[8],"random-access":[9],"storage;":[10,22],"CMOS":[11],"memory":[12],"circuits;":[13],"Internet":[14],"of":[15],"Things;":[16],"system-on-chip;":[17],"integrated":[18],"circuit":[19],"design;":[20],"cache":[21],"flip-flops;":[23],"magnetic":[24],"tunnelling.":[25]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":2},{"year":2021,"cited_by_count":4}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}