{"id":"https://openalex.org/W4285407082","doi":"https://doi.org/10.1109/comm54429.2022.9817183","title":"Python-Based Programming Framework for a Heterogeneous MapReduce Architecture","display_name":"Python-Based Programming Framework for a Heterogeneous MapReduce Architecture","publication_year":2022,"publication_date":"2022-06-16","ids":{"openalex":"https://openalex.org/W4285407082","doi":"https://doi.org/10.1109/comm54429.2022.9817183"},"language":"en","primary_location":{"id":"doi:10.1109/comm54429.2022.9817183","is_oa":false,"landing_page_url":"https://doi.org/10.1109/comm54429.2022.9817183","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 14th International Conference on Communications (COMM)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5010672926","display_name":"George-Vl\u0103du\u021b Popescu","orcid":"https://orcid.org/0000-0002-7962-1875"},"institutions":[{"id":"https://openalex.org/I61641377","display_name":"Universitatea Na\u021bional\u0103 de \u0218tiin\u021b\u0103 \u0219i Tehnologie Politehnica Bucure\u0219ti","ror":"https://ror.org/0558j5q12","country_code":"RO","type":"education","lineage":["https://openalex.org/I61641377"]}],"countries":["RO"],"is_corresponding":true,"raw_author_name":"George-Vladut Popescu","raw_affiliation_strings":["University Politehnica of Bucharest,Faculty of Electronics, Telecommunications and Information Technology,Bucharest,Romania","Faculty of Electronics, Telecommunications and Information Technology, University Politehnica of Bucharest, Bucharest, Romania"],"affiliations":[{"raw_affiliation_string":"University Politehnica of Bucharest,Faculty of Electronics, Telecommunications and Information Technology,Bucharest,Romania","institution_ids":["https://openalex.org/I61641377"]},{"raw_affiliation_string":"Faculty of Electronics, Telecommunications and Information Technology, University Politehnica of Bucharest, Bucharest, Romania","institution_ids":["https://openalex.org/I61641377"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5044543762","display_name":"C\u0103lin B\u00eer\u0103","orcid":"https://orcid.org/0000-0001-7111-6324"},"institutions":[{"id":"https://openalex.org/I61641377","display_name":"Universitatea Na\u021bional\u0103 de \u0218tiin\u021b\u0103 \u0219i Tehnologie Politehnica Bucure\u0219ti","ror":"https://ror.org/0558j5q12","country_code":"RO","type":"education","lineage":["https://openalex.org/I61641377"]}],"countries":["RO"],"is_corresponding":false,"raw_author_name":"Calin Bira","raw_affiliation_strings":["University Politehnica of Bucharest,Faculty of Electronics, Telecommunications and Information Technology,Bucharest,Romania","Faculty of Electronics, Telecommunications and Information Technology, University Politehnica of Bucharest, Bucharest, Romania"],"affiliations":[{"raw_affiliation_string":"University Politehnica of Bucharest,Faculty of Electronics, Telecommunications and Information Technology,Bucharest,Romania","institution_ids":["https://openalex.org/I61641377"]},{"raw_affiliation_string":"Faculty of Electronics, Telecommunications and Information Technology, University Politehnica of Bucharest, Bucharest, Romania","institution_ids":["https://openalex.org/I61641377"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5010672926"],"corresponding_institution_ids":["https://openalex.org/I61641377"],"apc_list":null,"apc_paid":null,"fwci":0.4539,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.58365904,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":95},"biblio":{"volume":"16","issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9865000247955322,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/python","display_name":"Python (programming language)","score":0.8586783409118652},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8482413291931152},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6780917644500732},{"id":"https://openalex.org/keywords/symmetric-multiprocessor-system","display_name":"Symmetric multiprocessor system","score":0.5701695680618286},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5656340718269348},{"id":"https://openalex.org/keywords/programming-paradigm","display_name":"Programming paradigm","score":0.5421680808067322},{"id":"https://openalex.org/keywords/software-framework","display_name":"Software framework","score":0.5351513028144836},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.5280414819717407},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.4801480174064636},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"Reconfigurable computing","score":0.4703134596347809},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.43488502502441406},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.42946022748947144},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3625611662864685},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.30165067315101624},{"id":"https://openalex.org/keywords/software-system","display_name":"Software system","score":0.29805344343185425},{"id":"https://openalex.org/keywords/component-based-software-engineering","display_name":"Component-based software engineering","score":0.21443989872932434}],"concepts":[{"id":"https://openalex.org/C519991488","wikidata":"https://www.wikidata.org/wiki/Q28865","display_name":"Python (programming language)","level":2,"score":0.8586783409118652},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8482413291931152},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6780917644500732},{"id":"https://openalex.org/C172430144","wikidata":"https://www.wikidata.org/wiki/Q17111997","display_name":"Symmetric multiprocessor system","level":2,"score":0.5701695680618286},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5656340718269348},{"id":"https://openalex.org/C34165917","wikidata":"https://www.wikidata.org/wiki/Q188267","display_name":"Programming paradigm","level":2,"score":0.5421680808067322},{"id":"https://openalex.org/C76518257","wikidata":"https://www.wikidata.org/wiki/Q271680","display_name":"Software framework","level":5,"score":0.5351513028144836},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.5280414819717407},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.4801480174064636},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.4703134596347809},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.43488502502441406},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.42946022748947144},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3625611662864685},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.30165067315101624},{"id":"https://openalex.org/C149091818","wikidata":"https://www.wikidata.org/wiki/Q2429814","display_name":"Software system","level":3,"score":0.29805344343185425},{"id":"https://openalex.org/C174683762","wikidata":"https://www.wikidata.org/wiki/Q609588","display_name":"Component-based software engineering","level":4,"score":0.21443989872932434},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/comm54429.2022.9817183","is_oa":false,"landing_page_url":"https://doi.org/10.1109/comm54429.2022.9817183","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 14th International Conference on Communications (COMM)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Quality Education","id":"https://metadata.un.org/sdg/4","score":0.5699999928474426}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W2004287193","https://openalex.org/W2105435765","https://openalex.org/W2127747666","https://openalex.org/W2173213060","https://openalex.org/W2551087352","https://openalex.org/W3092642880","https://openalex.org/W4249437221"],"related_works":["https://openalex.org/W1975561105","https://openalex.org/W2533043572","https://openalex.org/W2783439599","https://openalex.org/W3124194311","https://openalex.org/W2490611454","https://openalex.org/W4205516750","https://openalex.org/W2943815518","https://openalex.org/W3192695480","https://openalex.org/W4297842365","https://openalex.org/W2034022664"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,17,24,65],"low-maintenance,":[4],"short":[5],"development-cycle":[6],"programming":[7,40],"framework":[8,41],"(MRAFW)":[9],"which":[10],"allows":[11],"writing":[12],"and":[13,54,59],"running":[14],"software":[15,45],"for":[16,74],"custom":[18],"heterogeneous":[19],"pseudo-reconfigurable":[20],"computing":[21],"system":[22,29,52],"integrating":[23],"MapReduce":[25],"Accelerator.":[26],"The":[27,39],"target":[28],"implementation":[30],"is":[31],"based":[32],"on":[33],"AMD/Xilinx's":[34],"Zynq":[35],"SoC":[36],"hardware":[37],"platform.":[38],"uses":[42],"the":[43,51],"PYNQ":[44],"package":[46],"to":[47,50,55],"enable":[48],"access":[49],"resources":[53],"manage":[56],"CPU-FPGA":[57],"program":[58],"data":[60],"transfers.":[61],"Furthermore,":[62],"we":[63],"provide":[64],"library":[66],"of":[67],"optimized":[68],"low-level":[69],"functions":[70],"that":[71],"offer":[72],"support":[73],"executing":[75],"some":[76],"basic":[77],"linear":[78],"algebra":[79],"operations.":[80]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
