{"id":"https://openalex.org/W7161113479","doi":"https://doi.org/10.1109/cicc65509.2026.11509588","title":"A 92.5 TOPS/W Fully-Analog Multi-Layer Computing-in-Memory for State-Space Models in 28nm CMOS","display_name":"A 92.5 TOPS/W Fully-Analog Multi-Layer Computing-in-Memory for State-Space Models in 28nm CMOS","publication_year":2026,"publication_date":"2026-04-19","ids":{"openalex":"https://openalex.org/W7161113479","doi":"https://doi.org/10.1109/cicc65509.2026.11509588"},"language":null,"primary_location":{"id":"doi:10.1109/cicc65509.2026.11509588","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc65509.2026.11509588","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2026 IEEE Custom Integrated Circuits Conference (CICC)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5107078797","display_name":"Laith A. Shamieh","orcid":null},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Laith A. Shamieh","raw_affiliation_strings":["Georgia Institute of Technology,School of Electrical and Computer Engineering,Atlanta,GA,USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Georgia Institute of Technology,School of Electrical and Computer Engineering,Atlanta,GA,USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5136157609","display_name":"Wei-Chun Wang","orcid":null},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Wei-Chun Wang","raw_affiliation_strings":["Georgia Institute of Technology,School of Electrical and Computer Engineering,Atlanta,GA,USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Georgia Institute of Technology,School of Electrical and Computer Engineering,Atlanta,GA,USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5136182246","display_name":"Narasimha Kidambi","orcid":null},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Narasimha Kidambi","raw_affiliation_strings":["Georgia Institute of Technology,School of Electrical and Computer Engineering,Atlanta,GA,USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Georgia Institute of Technology,School of Electrical and Computer Engineering,Atlanta,GA,USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5136132547","display_name":"Saibal Mukhopadhyay","orcid":null},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Saibal Mukhopadhyay","raw_affiliation_strings":["Georgia Institute of Technology,School of Electrical and Computer Engineering,Atlanta,GA,USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Georgia Institute of Technology,School of Electrical and Computer Engineering,Atlanta,GA,USA","institution_ids":["https://openalex.org/I130701444"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I130701444"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.46674102,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.3783999979496002,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.3783999979496002,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.1981000006198883,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.18080000579357147,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.4302000105381012},{"id":"https://openalex.org/keywords/noise","display_name":"Noise (video)","score":0.28850001096725464},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.26269999146461487},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.24060000479221344}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5199999809265137},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.4302000105381012},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4154999852180481},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.33500000834465027},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3294999897480011},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.31060001254081726},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.28850001096725464},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.26269999146461487},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.24060000479221344},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.2387000024318695}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/cicc65509.2026.11509588","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc65509.2026.11509588","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2026 IEEE Custom Integrated Circuits Conference (CICC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.6984865665435791}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":[],"abstract_inverted_index":{"An":[0],"SRAM-based":[1],"Fully":[2],"Analog":[3],"STate-space":[4],"Compute-in-Memory":[5],"(FAST-CIM)":[6],"is":[7],"demonstrated":[8],"for":[9],"State":[10],"Space":[11],"Models":[12],"(SSMs).":[13],"The":[14],"all-analog":[15],"SSM":[16],"includes":[17],"a":[18,34],"recurrent-state-update":[19],"CIM":[20],"cascaded":[21],"with":[22,33],"feedforward":[23],"CIMs,":[24],"maintaining":[25],"signals":[26],"in":[27],"the":[28],"analog":[29],"domain":[30],"across":[31],"macros":[32],"single":[35],"digitization":[36],"point.":[37],"A":[38],"28":[39],"nm":[40],"CMOS":[41],"test-chip":[42],"demonstrates":[43],"compute":[44,51],"efficiency":[45],"up":[46],"to":[47],"92.5":[48],"TOPS/W":[49],"and":[50],"density":[52],"of":[53],"28.8":[54],"TOPS/mm2.":[55]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2026-05-15T00:00:00"}