{"id":"https://openalex.org/W4376132517","doi":"https://doi.org/10.1109/cicc57935.2023.10121322","title":"A 0.99\u03bcs FFT-Based Fast-Locking, 0.82GHz-to-4.1GHz DPLL-Based Input-Jitter-Filtering Clock Driver with Wide-Range Mode-Switching 8-Shaped LC Oscillator for DRAM Interfaces","display_name":"A 0.99\u03bcs FFT-Based Fast-Locking, 0.82GHz-to-4.1GHz DPLL-Based Input-Jitter-Filtering Clock Driver with Wide-Range Mode-Switching 8-Shaped LC Oscillator for DRAM Interfaces","publication_year":2023,"publication_date":"2023-04-01","ids":{"openalex":"https://openalex.org/W4376132517","doi":"https://doi.org/10.1109/cicc57935.2023.10121322"},"language":"en","primary_location":{"id":"doi:10.1109/cicc57935.2023.10121322","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc57935.2023.10121322","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE Custom Integrated Circuits Conference (CICC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5059104146","display_name":"Woosong Jung","orcid":"https://orcid.org/0000-0002-7470-1630"},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":true,"raw_author_name":"Woosong Jung","raw_affiliation_strings":["Seoul National University,Seoul,Korea","Seoul National University, Seoul, Korea"],"affiliations":[{"raw_affiliation_string":"Seoul National University,Seoul,Korea","institution_ids":["https://openalex.org/I139264467"]},{"raw_affiliation_string":"Seoul National University, Seoul, Korea","institution_ids":["https://openalex.org/I139264467"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5017126528","display_name":"Hyo\u2010Jun Kim","orcid":"https://orcid.org/0000-0002-7176-576X"},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Hyojun Kim","raw_affiliation_strings":["Seoul National University,Seoul,Korea","Seoul National University, Seoul, Korea"],"affiliations":[{"raw_affiliation_string":"Seoul National University,Seoul,Korea","institution_ids":["https://openalex.org/I139264467"]},{"raw_affiliation_string":"Seoul National University, Seoul, Korea","institution_ids":["https://openalex.org/I139264467"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5028998821","display_name":"Yeonggeun Song","orcid":"https://orcid.org/0000-0002-6021-8912"},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Yeonggeun Song","raw_affiliation_strings":["Seoul National University,Seoul,Korea","Seoul National University, Seoul, Korea"],"affiliations":[{"raw_affiliation_string":"Seoul National University,Seoul,Korea","institution_ids":["https://openalex.org/I139264467"]},{"raw_affiliation_string":"Seoul National University, Seoul, Korea","institution_ids":["https://openalex.org/I139264467"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101620680","display_name":"Kwang-Hoon Lee","orcid":"https://orcid.org/0000-0001-8132-2877"},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Kwang-Hoon Lee","raw_affiliation_strings":["Seoul National University,Seoul,Korea","Seoul National University, Seoul, Korea"],"affiliations":[{"raw_affiliation_string":"Seoul National University,Seoul,Korea","institution_ids":["https://openalex.org/I139264467"]},{"raw_affiliation_string":"Seoul National University, Seoul, Korea","institution_ids":["https://openalex.org/I139264467"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5008010401","display_name":"Deog\u2010Kyoon Jeong","orcid":"https://orcid.org/0000-0003-0436-703X"},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Deog-Kyoon Jeong","raw_affiliation_strings":["Seoul National University,Seoul,Korea","Seoul National University, Seoul, Korea"],"affiliations":[{"raw_affiliation_string":"Seoul National University,Seoul,Korea","institution_ids":["https://openalex.org/I139264467"]},{"raw_affiliation_string":"Seoul National University, Seoul, Korea","institution_ids":["https://openalex.org/I139264467"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5059104146"],"corresponding_institution_ids":["https://openalex.org/I139264467"],"apc_list":null,"apc_paid":null,"fwci":0.6694,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.67664301,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"2"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.8347576856613159},{"id":"https://openalex.org/keywords/dpll-algorithm","display_name":"DPLL algorithm","score":0.7511703968048096},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.7485178112983704},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.587023913860321},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5267086625099182},{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.47880467772483826},{"id":"https://openalex.org/keywords/phase-noise","display_name":"Phase noise","score":0.44011014699935913},{"id":"https://openalex.org/keywords/noise","display_name":"Noise (video)","score":0.4322358965873718},{"id":"https://openalex.org/keywords/electronic-oscillator","display_name":"Electronic oscillator","score":0.41048717498779297},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.3886778652667999},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.22786173224449158},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.22629818320274353},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.21925750374794006},{"id":"https://openalex.org/keywords/voltage-controlled-oscillator","display_name":"Voltage-controlled oscillator","score":0.17501932382583618},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.07993173599243164}],"concepts":[{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.8347576856613159},{"id":"https://openalex.org/C143936061","wikidata":"https://www.wikidata.org/wiki/Q2030088","display_name":"DPLL algorithm","level":4,"score":0.7511703968048096},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.7485178112983704},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.587023913860321},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5267086625099182},{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.47880467772483826},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.44011014699935913},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.4322358965873718},{"id":"https://openalex.org/C184492301","wikidata":"https://www.wikidata.org/wiki/Q249997","display_name":"Electronic oscillator","level":4,"score":0.41048717498779297},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.3886778652667999},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.22786173224449158},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.22629818320274353},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.21925750374794006},{"id":"https://openalex.org/C5291336","wikidata":"https://www.wikidata.org/wiki/Q852341","display_name":"Voltage-controlled oscillator","level":3,"score":0.17501932382583618},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.07993173599243164},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/cicc57935.2023.10121322","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc57935.2023.10121322","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE Custom Integrated Circuits Conference (CICC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W2790060412","https://openalex.org/W3028280451","https://openalex.org/W3160741372","https://openalex.org/W6777901400"],"related_works":["https://openalex.org/W1488060887","https://openalex.org/W2380467267","https://openalex.org/W1980525453","https://openalex.org/W2325206724","https://openalex.org/W2094329012","https://openalex.org/W1994021281","https://openalex.org/W2103754166","https://openalex.org/W2043945969","https://openalex.org/W2139484866","https://openalex.org/W2082469970"],"abstract_inverted_index":{"Owing":[0],"to":[1,93,148],"the":[2,24,37,60,65,76,86,94,114,132],"jitter-filtering":[3],"nature,":[4],"a":[5,12,32,45,56,83,99,103,117,143],"phase-locked":[6],"loop":[7],"(PLL)":[8],"often":[9],"plays":[10],"as":[11],"clock":[13,26],"driver":[14],"in":[15,23,64,79,98],"memory":[16],"systems,":[17],"cleaning":[18],"out":[19],"highfrequency":[20],"noise":[21,40],"present":[22],"overall":[25],"distribution":[27],"path.":[28],"For":[29],"LC":[30],"oscillators,":[31],"parallel":[33],"multi-core":[34],"topology":[35],"enhances":[36],"output":[38],"phase":[39],"but":[41,59,112],"still":[42,146],"suffers":[43],"from":[44],"narrow":[46],"frequency":[47,110],"tuning":[48],"range":[49],"(FTR).":[50],"To":[51],"overcome":[52],"this,":[53],"[1]":[54],"employs":[55],"mode":[57,67],"switching,":[58],"negligible":[61],"equivalent":[62],"inductance":[63],"odd":[66],"requires":[68],"excessively":[69],"large":[70],"capacitance":[71],"for":[72,142],"low-frequency":[73],"oscillation.":[74],"While":[75],"coupling":[77],"method":[78,141],"[2]":[80],"also":[81],"gives":[82],"wide":[84,144],"FTR,":[85],"achievable":[87],"area":[88,119],"efficiency":[89],"is":[90],"limited":[91],"due":[92],"spiral":[95],"inductor":[96],"structure.":[97],"digital":[100,126],"PLL":[101],"(DPLL),":[102],"widerange":[104],"time-to-digital":[105],"converter":[106],"(TDC)":[107],"achieves":[108],"fast":[109],"acquisition":[111],"at":[113],"expense":[115],"of":[116],"larger":[118],"and":[120],"power.":[121],"Although":[122],"gear-shifting":[123],"[3]\u2013[4]":[124],"or":[125],"frequency-error":[127],"recovery":[128],"[5]":[129],"may":[130],"reduce":[131],"lock":[133],"time":[134],"without":[135],"much":[136],"hardware":[137],"overhead,":[138],"an":[139],"effective":[140],"FTR":[145],"remains":[147],"be":[149],"sought.":[150]},"counts_by_year":[{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}