{"id":"https://openalex.org/W4376150505","doi":"https://doi.org/10.1109/cicc57935.2023.10121284","title":"Open-Source AXI4 Adapters for Chiplet Architectures","display_name":"Open-Source AXI4 Adapters for Chiplet Architectures","publication_year":2023,"publication_date":"2023-04-01","ids":{"openalex":"https://openalex.org/W4376150505","doi":"https://doi.org/10.1109/cicc57935.2023.10121284"},"language":"en","primary_location":{"id":"doi:10.1109/cicc57935.2023.10121284","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc57935.2023.10121284","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE Custom Integrated Circuits Conference (CICC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5091926078","display_name":"Nij Dorairaj","orcid":null},"institutions":[{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]}],"countries":["GB"],"is_corresponding":true,"raw_author_name":"Nij Dorairaj","raw_affiliation_strings":["Intel Corporation"],"affiliations":[{"raw_affiliation_string":"Intel Corporation","institution_ids":["https://openalex.org/I4210158342"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5003017713","display_name":"David Kehlet","orcid":null},"institutions":[{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"David Kehlet","raw_affiliation_strings":["Intel Corporation"],"affiliations":[{"raw_affiliation_string":"Intel Corporation","institution_ids":["https://openalex.org/I4210158342"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5088477949","display_name":"Farhana Sheikh","orcid":"https://orcid.org/0000-0001-5078-0816"},"institutions":[{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Farhana Sheikh","raw_affiliation_strings":["Intel Corporation"],"affiliations":[{"raw_affiliation_string":"Intel Corporation","institution_ids":["https://openalex.org/I4210158342"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101108306","display_name":"Julie Zhang","orcid":null},"institutions":[{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Julie Zhang","raw_affiliation_strings":["Intel Corporation"],"affiliations":[{"raw_affiliation_string":"Intel Corporation","institution_ids":["https://openalex.org/I4210158342"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5021864650","display_name":"Yunhui Huang","orcid":"https://orcid.org/0000-0003-1687-1938"},"institutions":[{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"YunHui Huang","raw_affiliation_strings":["Intel Corporation"],"affiliations":[{"raw_affiliation_string":"Intel Corporation","institution_ids":["https://openalex.org/I4210158342"]}]},{"author_position":"last","author":{"id":null,"display_name":"Shawn Wang","orcid":null},"institutions":[{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Shawn Wang","raw_affiliation_strings":["Intel Corporation"],"affiliations":[{"raw_affiliation_string":"Intel Corporation","institution_ids":["https://openalex.org/I4210158342"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5091926078"],"corresponding_institution_ids":["https://openalex.org/I4210158342"],"apc_list":null,"apc_paid":null,"fwci":0.7916,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.72347066,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7928091287612915},{"id":"https://openalex.org/keywords/skew","display_name":"Skew","score":0.7098711133003235},{"id":"https://openalex.org/keywords/adapter","display_name":"Adapter (computing)","score":0.6185399293899536},{"id":"https://openalex.org/keywords/open-source","display_name":"Open source","score":0.5578606128692627},{"id":"https://openalex.org/keywords/phy","display_name":"PHY","score":0.4921078085899353},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.47542455792427063},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.46778926253318787},{"id":"https://openalex.org/keywords/osi-model","display_name":"OSI model","score":0.43763455748558044},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.42961210012435913},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.3788890242576599},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.3570559620857239},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.23204970359802246},{"id":"https://openalex.org/keywords/physical-layer","display_name":"Physical layer","score":0.18754708766937256},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.1783897578716278},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.1277085542678833}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7928091287612915},{"id":"https://openalex.org/C43711488","wikidata":"https://www.wikidata.org/wiki/Q7534783","display_name":"Skew","level":2,"score":0.7098711133003235},{"id":"https://openalex.org/C177284502","wikidata":"https://www.wikidata.org/wiki/Q1005390","display_name":"Adapter (computing)","level":2,"score":0.6185399293899536},{"id":"https://openalex.org/C3018397939","wikidata":"https://www.wikidata.org/wiki/Q3644502","display_name":"Open source","level":3,"score":0.5578606128692627},{"id":"https://openalex.org/C41918916","wikidata":"https://www.wikidata.org/wiki/Q192727","display_name":"PHY","level":4,"score":0.4921078085899353},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.47542455792427063},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.46778926253318787},{"id":"https://openalex.org/C168535184","wikidata":"https://www.wikidata.org/wiki/Q93312","display_name":"OSI model","level":3,"score":0.43763455748558044},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.42961210012435913},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.3788890242576599},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.3570559620857239},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.23204970359802246},{"id":"https://openalex.org/C19247436","wikidata":"https://www.wikidata.org/wiki/Q192727","display_name":"Physical layer","level":3,"score":0.18754708766937256},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.1783897578716278},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.1277085542678833},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/cicc57935.2023.10121284","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc57935.2023.10121284","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE Custom Integrated Circuits Conference (CICC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":1,"referenced_works":["https://openalex.org/W2059059049"],"related_works":["https://openalex.org/W2133028525","https://openalex.org/W4229060448","https://openalex.org/W4306381730","https://openalex.org/W2981692913","https://openalex.org/W3044188621","https://openalex.org/W3184035966","https://openalex.org/W4283023968","https://openalex.org/W2485605994","https://openalex.org/W1964667553","https://openalex.org/W2160602540"],"abstract_inverted_index":{"Growing":[0],"use":[1],"of":[2,53],"heterogeneous":[3],"integration":[4],"to":[5,27,46],"support":[6],"emerging":[7],"applications":[8],"necessitates":[9],"open-source":[10,39],"PHY/MAC":[11],"layer":[12],"standard":[13,21],"protocols.":[14],"AXI4":[15,40],"has":[16],"been":[17],"adopted":[18],"as":[19],"a":[20],"on-chip":[22],"interconnect,":[23],"making":[24],"it":[25],"ideal":[26],"enable":[28],"seamless":[29],"data":[30,49],"transfer":[31],"across":[32],"chiplets.":[33],"This":[34],"paper":[35],"presents":[36],"the":[37],"first":[38],"Adapter":[41],"that":[42],"integrates":[43],"with":[44],"AIB2.0":[45],"address":[47],"D2D":[48],"transfer.":[50],"An":[51],"overview":[52],"clocking,":[54],"flow":[55],"control,":[56],"and":[57,72],"data-skew":[58],"challenges":[59],"posed":[60],"by":[61,67],"disaggregated":[62],"chiplets":[63],"is":[64],"reviewed,":[65],"followed":[66],"implementation,":[68],"IP":[69],"generation":[70],"methodology,":[71],"verification":[73],"results.":[74]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":2}],"updated_date":"2026-04-17T18:11:37.981687","created_date":"2025-10-10T00:00:00"}