{"id":"https://openalex.org/W4280524069","doi":"https://doi.org/10.1109/cicc53496.2022.9772796","title":"A 9GHz 72fs-Total-lntegrated-Jitter Fractional-N Digital PLL with Calibrated Frequency Quadrupler","display_name":"A 9GHz 72fs-Total-lntegrated-Jitter Fractional-N Digital PLL with Calibrated Frequency Quadrupler","publication_year":2022,"publication_date":"2022-04-01","ids":{"openalex":"https://openalex.org/W4280524069","doi":"https://doi.org/10.1109/cicc53496.2022.9772796"},"language":"en","primary_location":{"id":"doi:10.1109/cicc53496.2022.9772796","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc53496.2022.9772796","pdf_url":null,"source":{"id":"https://openalex.org/S4363608585","display_name":"2022 IEEE Custom Integrated Circuits Conference (CICC)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 IEEE Custom Integrated Circuits Conference (CICC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5013353836","display_name":"Francesco Buccoleri","orcid":"https://orcid.org/0000-0003-2986-9570"},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":true,"raw_author_name":"Francesco Buccoleri","raw_affiliation_strings":["Politecnico di Milano,Milano,Italy","Politecnico di Milano, Milano, Italy"],"affiliations":[{"raw_affiliation_string":"Politecnico di Milano,Milano,Italy","institution_ids":["https://openalex.org/I93860229"]},{"raw_affiliation_string":"Politecnico di Milano, Milano, Italy","institution_ids":["https://openalex.org/I93860229"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5010409811","display_name":"Simone M. Dartizio","orcid":"https://orcid.org/0000-0001-5983-5609"},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Simone M. Dartizio","raw_affiliation_strings":["Politecnico di Milano,Milano,Italy","Politecnico di Milano, Milano, Italy"],"affiliations":[{"raw_affiliation_string":"Politecnico di Milano,Milano,Italy","institution_ids":["https://openalex.org/I93860229"]},{"raw_affiliation_string":"Politecnico di Milano, Milano, Italy","institution_ids":["https://openalex.org/I93860229"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5035434717","display_name":"Francesco Tesolin","orcid":"https://orcid.org/0000-0002-9743-5726"},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Francesco Tesolin","raw_affiliation_strings":["Politecnico di Milano,Milano,Italy","Politecnico di Milano, Milano, Italy"],"affiliations":[{"raw_affiliation_string":"Politecnico di Milano,Milano,Italy","institution_ids":["https://openalex.org/I93860229"]},{"raw_affiliation_string":"Politecnico di Milano, Milano, Italy","institution_ids":["https://openalex.org/I93860229"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5015496349","display_name":"Luca Avallone","orcid":"https://orcid.org/0000-0002-2243-5588"},"institutions":[{"id":"https://openalex.org/I4210131793","display_name":"Infineon Technologies (Austria)","ror":"https://ror.org/03msng824","country_code":"AT","type":"company","lineage":["https://openalex.org/I137594350","https://openalex.org/I4210131793"]}],"countries":["AT"],"is_corresponding":false,"raw_author_name":"Luca Avallone","raw_affiliation_strings":["Infineon Technologies,Villach,Austria","Infineon Technologies, Villach, Austria"],"affiliations":[{"raw_affiliation_string":"Infineon Technologies,Villach,Austria","institution_ids":["https://openalex.org/I4210131793"]},{"raw_affiliation_string":"Infineon Technologies, Villach, Austria","institution_ids":["https://openalex.org/I4210131793"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5075806913","display_name":"Alessio Santiccioli","orcid":"https://orcid.org/0000-0002-2301-5702"},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Alessio Santiccioli","raw_affiliation_strings":["Politecnico di Milano,Milano,Italy","Politecnico di Milano, Milano, Italy"],"affiliations":[{"raw_affiliation_string":"Politecnico di Milano,Milano,Italy","institution_ids":["https://openalex.org/I93860229"]},{"raw_affiliation_string":"Politecnico di Milano, Milano, Italy","institution_ids":["https://openalex.org/I93860229"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5059697368","display_name":"Agata Iesurum","orcid":"https://orcid.org/0000-0002-3277-9261"},"institutions":[{"id":"https://openalex.org/I138689650","display_name":"University of Padua","ror":"https://ror.org/00240q980","country_code":"IT","type":"education","lineage":["https://openalex.org/I138689650"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Agata Iesurum","raw_affiliation_strings":["University of Padova,Padova,Italy","University of Padova, Padova, Italy"],"affiliations":[{"raw_affiliation_string":"University of Padova,Padova,Italy","institution_ids":["https://openalex.org/I138689650"]},{"raw_affiliation_string":"University of Padova, Padova, Italy","institution_ids":["https://openalex.org/I138689650"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5069215336","display_name":"Giovanni Steffan","orcid":null},"institutions":[{"id":"https://openalex.org/I4210131793","display_name":"Infineon Technologies (Austria)","ror":"https://ror.org/03msng824","country_code":"AT","type":"company","lineage":["https://openalex.org/I137594350","https://openalex.org/I4210131793"]}],"countries":["AT"],"is_corresponding":false,"raw_author_name":"Giovanni Steffan","raw_affiliation_strings":["Infineon Technologies,Villach,Austria","Infineon Technologies, Villach, Austria"],"affiliations":[{"raw_affiliation_string":"Infineon Technologies,Villach,Austria","institution_ids":["https://openalex.org/I4210131793"]},{"raw_affiliation_string":"Infineon Technologies, Villach, Austria","institution_ids":["https://openalex.org/I4210131793"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5035099638","display_name":"Andrea Bevilacqua","orcid":"https://orcid.org/0000-0002-5664-9197"},"institutions":[{"id":"https://openalex.org/I138689650","display_name":"University of Padua","ror":"https://ror.org/00240q980","country_code":"IT","type":"education","lineage":["https://openalex.org/I138689650"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Andrea Bevilacqua","raw_affiliation_strings":["University of Padova,Padova,Italy","University of Padova, Padova, Italy"],"affiliations":[{"raw_affiliation_string":"University of Padova,Padova,Italy","institution_ids":["https://openalex.org/I138689650"]},{"raw_affiliation_string":"University of Padova, Padova, Italy","institution_ids":["https://openalex.org/I138689650"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5071532224","display_name":"Luca Bertulessi","orcid":"https://orcid.org/0000-0001-6167-6512"},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Luca Bertulessi","raw_affiliation_strings":["Politecnico di Milano,Milano,Italy","Politecnico di Milano, Milano, Italy"],"affiliations":[{"raw_affiliation_string":"Politecnico di Milano,Milano,Italy","institution_ids":["https://openalex.org/I93860229"]},{"raw_affiliation_string":"Politecnico di Milano, Milano, Italy","institution_ids":["https://openalex.org/I93860229"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5046032176","display_name":"Dmytro Cherniak","orcid":"https://orcid.org/0000-0001-7662-9022"},"institutions":[{"id":"https://openalex.org/I4210131793","display_name":"Infineon Technologies (Austria)","ror":"https://ror.org/03msng824","country_code":"AT","type":"company","lineage":["https://openalex.org/I137594350","https://openalex.org/I4210131793"]}],"countries":["AT"],"is_corresponding":false,"raw_author_name":"Dmytro Cherniak","raw_affiliation_strings":["Infineon Technologies,Villach,Austria","Infineon Technologies, Villach, Austria"],"affiliations":[{"raw_affiliation_string":"Infineon Technologies,Villach,Austria","institution_ids":["https://openalex.org/I4210131793"]},{"raw_affiliation_string":"Infineon Technologies, Villach, Austria","institution_ids":["https://openalex.org/I4210131793"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5073514694","display_name":"Carlo Samori","orcid":"https://orcid.org/0000-0002-7084-0721"},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Carlo Samori","raw_affiliation_strings":["Politecnico di Milano,Milano,Italy","Politecnico di Milano, Milano, Italy"],"affiliations":[{"raw_affiliation_string":"Politecnico di Milano,Milano,Italy","institution_ids":["https://openalex.org/I93860229"]},{"raw_affiliation_string":"Politecnico di Milano, Milano, Italy","institution_ids":["https://openalex.org/I93860229"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5051946676","display_name":"Andrea L. Lacaita","orcid":"https://orcid.org/0000-0003-0315-514X"},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Andrea L. Lacaita","raw_affiliation_strings":["Politecnico di Milano,Milano,Italy","Politecnico di Milano, Milano, Italy"],"affiliations":[{"raw_affiliation_string":"Politecnico di Milano,Milano,Italy","institution_ids":["https://openalex.org/I93860229"]},{"raw_affiliation_string":"Politecnico di Milano, Milano, Italy","institution_ids":["https://openalex.org/I93860229"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5085904857","display_name":"Salvatore Levantino","orcid":"https://orcid.org/0000-0003-0895-1700"},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Salvatore Levantino","raw_affiliation_strings":["Politecnico di Milano,Milano,Italy","Politecnico di Milano, Milano, Italy"],"affiliations":[{"raw_affiliation_string":"Politecnico di Milano,Milano,Italy","institution_ids":["https://openalex.org/I93860229"]},{"raw_affiliation_string":"Politecnico di Milano, Milano, Italy","institution_ids":["https://openalex.org/I93860229"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":13,"corresponding_author_ids":["https://openalex.org/A5013353836"],"corresponding_institution_ids":["https://openalex.org/I93860229"],"apc_list":null,"apc_paid":null,"fwci":1.9334,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.85410185,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"2"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11429","display_name":"Semiconductor Lasers and Optical Devices","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.995199978351593,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.8109580278396606},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.7718018293380737},{"id":"https://openalex.org/keywords/phase-noise","display_name":"Phase noise","score":0.7446842789649963},{"id":"https://openalex.org/keywords/dpll-algorithm","display_name":"DPLL algorithm","score":0.7248767614364624},{"id":"https://openalex.org/keywords/digitally-controlled-oscillator","display_name":"Digitally controlled oscillator","score":0.6101579070091248},{"id":"https://openalex.org/keywords/delta-sigma-modulation","display_name":"Delta-sigma modulation","score":0.5647734999656677},{"id":"https://openalex.org/keywords/oversampling","display_name":"Oversampling","score":0.4906381666660309},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.485041081905365},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.45662248134613037},{"id":"https://openalex.org/keywords/clock-rate","display_name":"Clock rate","score":0.45409271121025085},{"id":"https://openalex.org/keywords/noise","display_name":"Noise (video)","score":0.43873730301856995},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.35920873284339905},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.35782259702682495},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.33452874422073364},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.24684280157089233},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.21760451793670654},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.16205692291259766},{"id":"https://openalex.org/keywords/delay-line-oscillator","display_name":"Delay line oscillator","score":0.156437486410141}],"concepts":[{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.8109580278396606},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.7718018293380737},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.7446842789649963},{"id":"https://openalex.org/C143936061","wikidata":"https://www.wikidata.org/wiki/Q2030088","display_name":"DPLL algorithm","level":4,"score":0.7248767614364624},{"id":"https://openalex.org/C167872736","wikidata":"https://www.wikidata.org/wiki/Q5276224","display_name":"Digitally controlled oscillator","level":5,"score":0.6101579070091248},{"id":"https://openalex.org/C68754193","wikidata":"https://www.wikidata.org/wiki/Q1184820","display_name":"Delta-sigma modulation","level":3,"score":0.5647734999656677},{"id":"https://openalex.org/C197323446","wikidata":"https://www.wikidata.org/wiki/Q331222","display_name":"Oversampling","level":3,"score":0.4906381666660309},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.485041081905365},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.45662248134613037},{"id":"https://openalex.org/C178693496","wikidata":"https://www.wikidata.org/wiki/Q911691","display_name":"Clock rate","level":3,"score":0.45409271121025085},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.43873730301856995},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.35920873284339905},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.35782259702682495},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.33452874422073364},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.24684280157089233},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.21760451793670654},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.16205692291259766},{"id":"https://openalex.org/C26907483","wikidata":"https://www.wikidata.org/wiki/Q5253479","display_name":"Delay line oscillator","level":4,"score":0.156437486410141},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/cicc53496.2022.9772796","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc53496.2022.9772796","pdf_url":null,"source":{"id":"https://openalex.org/S4363608585","display_name":"2022 IEEE Custom Integrated Circuits Conference (CICC)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 IEEE Custom Integrated Circuits Conference (CICC)","raw_type":"proceedings-article"},{"id":"pmh:oai:re.public.polimi.it:11311/1218504","is_oa":false,"landing_page_url":"http://hdl.handle.net/11311/1218504","pdf_url":null,"source":{"id":"https://openalex.org/S4306400312","display_name":"Virtual Community of Pathological Anatomy (University of Castilla La Mancha)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I79189158","host_organization_name":"University of Castilla-La Mancha","host_organization_lineage":["https://openalex.org/I79189158"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/conferenceObject"},{"id":"pmh:oai:www.research.unipd.it:11577/3448327","is_oa":false,"landing_page_url":"http://hdl.handle.net/11577/3448327","pdf_url":null,"source":{"id":"https://openalex.org/S4306402547","display_name":"Padua Research Archive (University of Padova)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I138689650","host_organization_name":"University of Padua","host_organization_lineage":["https://openalex.org/I138689650"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":3,"referenced_works":["https://openalex.org/W3135554245","https://openalex.org/W3135783513","https://openalex.org/W3184201630"],"related_works":["https://openalex.org/W2343605460","https://openalex.org/W3176167732","https://openalex.org/W1481111971","https://openalex.org/W3135664810","https://openalex.org/W3135783513","https://openalex.org/W1972698597","https://openalex.org/W2148570224","https://openalex.org/W4280524069","https://openalex.org/W2153157832","https://openalex.org/W3133764484"],"abstract_inverted_index":{"Sub-100fs":[0],"fractional-N":[1,264],"PLLs":[2,70],"in":[3,26,100,117,177,217,233,246],"the":[4,35,39,46,49,55,82,92,106,110,128,153,160,169,174,178,187,201,212,218,234,237,247,250,304,307],"tens":[5],"of":[6,38,86,91,94,105,130,134,306],"GHz":[7],"range":[8],"are":[9,31,192,228],"required":[10],"by":[11,54,120,296],"modern":[12],"wireless":[13],"standards":[14],"such":[15,62],"as":[16,63],"5G":[17],"[1].":[18],"The":[19,102,288],"main":[20,226],"factors":[21],"limiting":[22],"jitter":[23,274],"and":[24,142,162,225,244,280,312],"spot-noise":[25],"a":[27,131,147,206,262,292,297,314],"digital":[28,265],"PLL":[29,198,227,267,289,322],"(DPLL)":[30],"on":[32,45,195,291,313],"one":[33],"hand":[34],"phase":[36,80,326],"noise":[37,51],"digitally":[40],"controlled":[41],"oscillator":[42],"(DCO)":[43],"and,":[44],"other":[47],"hand,":[48],"quantization":[50],"(QN)":[52],"introduced":[53,108],"DCO":[56,111,122,135,154,213],"frequency":[57,171,204,208,238],"granularity.":[58],"Though":[59],"several":[60],"approaches,":[61],"multi-core":[64,69],"oscillators":[65],"[2],":[66],"[3]":[67],"or":[68,205],"[4]":[71],"have":[72],"been":[73],"explored":[74],"to":[75,158,168,172,180,185,230,256,302,324],"trade":[76],"power":[77,243],"consumption":[78],"against":[79],"noise,":[81],"theoretical":[83],"phase-noise":[84,283],"reduction":[85],"3dB":[87],"per":[88],"each":[89],"doubling":[90],"number":[93,133],"cores":[95,323],"is":[96],"never":[97],"fully":[98],"obtained":[99],"practice.":[101],"second":[103,235],"issue":[104],"QN":[107,161,175,305],"at":[109,127,277,285],"analog/digital":[112],"domain":[113],"crossing":[114,248],"could":[115],"be":[116,156,257],"principle":[118],"solved":[119],"increasing":[121],"resolution,":[123],"but":[124],"this":[125],"comes":[126],"cost":[129],"larger":[132,143],"bits":[136],"which":[137,199,319],"entails":[138],"higher":[139,181],"design":[140],"complexity":[141],"area":[144],"occupation.":[145],"Alternatively,":[146],"<tex":[148,188,308],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[149,189,309],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">$\\Delta\\Sigma$</tex>":[150,190,310],"modulator":[151],"driving":[152],"can":[155],"used":[157],"high-pass-shape":[159],"its":[163],"clock":[164,191,203,253],"oversampled":[165],"with":[166],"respect":[167],"reference":[170,202],"move":[173],"bump":[176],"spectrum":[179],"frequency.":[182],"Prior":[183],"solutions":[184],"generate":[186],"based":[193],"either":[194],"an":[196],"auxiliary":[197,224],"multiplies":[200],"high-speed":[207],"divider":[209,239],"that":[210],"divides":[211],"output":[214],"[3].":[215],"While":[216],"first":[219],"case":[220],"pulling":[221],"phenomena":[222],"between":[223,249],"observed":[229],"worsen":[231],"performance,":[232],"case,":[236],"may":[240],"consume":[241],"large":[242],"metastability":[245],"two":[251,321],"non-synchronous":[252],"domains":[254],"has":[255],"addressed.":[258],"This":[259],"work":[260],"presents":[261],"9GHz":[263],"bang-bang":[266],"(BBPLL)":[268],"achieving":[269],"72fs":[270],"rms":[271],"total":[272],"integrated":[273],"(including":[275],"spurs)":[276],"near-integer":[278],"channels":[279],"-140.7dBc/Hz":[281],"spot":[282],"level":[284],"10MHz":[286],"offset.":[287],"relies":[290],"low-power":[293],"quadrupler":[294],"calibrated":[295],"background":[298],"digital-period-averaging":[299],"(DPA)":[300],"algorithm":[301],"reduce":[303,325],"DCO,":[311],"low-noise":[315],"true-in-phase":[316],"combiner":[317],"(TIPC)":[318],"combines":[320],"noise.":[327]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}