{"id":"https://openalex.org/W3017609819","doi":"https://doi.org/10.1109/cicc48029.2020.9075897","title":"A 0.5V-to-0.9V 0.2GHz-to-5GHz Ultra-Low-Power Digitally-Assisted Analog Ring PLL with Less Than 200ns Lock Time in 22nm FinFET CMOS Technology","display_name":"A 0.5V-to-0.9V 0.2GHz-to-5GHz Ultra-Low-Power Digitally-Assisted Analog Ring PLL with Less Than 200ns Lock Time in 22nm FinFET CMOS Technology","publication_year":2020,"publication_date":"2020-03-01","ids":{"openalex":"https://openalex.org/W3017609819","doi":"https://doi.org/10.1109/cicc48029.2020.9075897","mag":"3017609819"},"language":"en","primary_location":{"id":"doi:10.1109/cicc48029.2020.9075897","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc48029.2020.9075897","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 IEEE Custom Integrated Circuits Conference (CICC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5102022205","display_name":"Bo Xiang","orcid":"https://orcid.org/0000-0003-1828-2088"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Bo Xiang","raw_affiliation_strings":["Intel, Hillsboro, OR, USA"],"affiliations":[{"raw_affiliation_string":"Intel, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5018623391","display_name":"Y. Fan","orcid":"https://orcid.org/0000-0001-5914-2765"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yongping Fan","raw_affiliation_strings":["Intel, Hillsboro, OR, USA"],"affiliations":[{"raw_affiliation_string":"Intel, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5022406123","display_name":"James Ayers","orcid":"https://orcid.org/0000-0001-9801-3384"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"James Ayers","raw_affiliation_strings":["Intel, Hillsboro, OR, USA"],"affiliations":[{"raw_affiliation_string":"Intel, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5042470757","display_name":"James Shen","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"James Shen","raw_affiliation_strings":["Intel, Hillsboro, OR, USA"],"affiliations":[{"raw_affiliation_string":"Intel, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100456014","display_name":"Dan Zhang","orcid":"https://orcid.org/0000-0002-1183-2166"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Dan Zhang","raw_affiliation_strings":["Intel, Hillsboro, OR, USA"],"affiliations":[{"raw_affiliation_string":"Intel, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5102022205"],"corresponding_institution_ids":["https://openalex.org/I1343180700"],"apc_list":null,"apc_paid":null,"fwci":0.9247,"has_fulltext":false,"cited_by_count":16,"citation_normalized_percentile":{"value":0.74011515,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9977999925613403,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9968000054359436,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.8516261577606201},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6643344759941101},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5645425319671631},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.5160996317863464},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.48575952649116516},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4764963984489441},{"id":"https://openalex.org/keywords/lock","display_name":"Lock (firearm)","score":0.47384554147720337},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4539955258369446},{"id":"https://openalex.org/keywords/low-power-electronics","display_name":"Low-power electronics","score":0.43632131814956665},{"id":"https://openalex.org/keywords/clock-rate","display_name":"Clock rate","score":0.43328583240509033},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3932250440120697},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.33153408765792847},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.11004814505577087},{"id":"https://openalex.org/keywords/phase-noise","display_name":"Phase noise","score":0.10716453194618225}],"concepts":[{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.8516261577606201},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6643344759941101},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5645425319671631},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.5160996317863464},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.48575952649116516},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4764963984489441},{"id":"https://openalex.org/C174839445","wikidata":"https://www.wikidata.org/wiki/Q1134386","display_name":"Lock (firearm)","level":2,"score":0.47384554147720337},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4539955258369446},{"id":"https://openalex.org/C117551214","wikidata":"https://www.wikidata.org/wiki/Q6692774","display_name":"Low-power electronics","level":4,"score":0.43632131814956665},{"id":"https://openalex.org/C178693496","wikidata":"https://www.wikidata.org/wiki/Q911691","display_name":"Clock rate","level":3,"score":0.43328583240509033},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3932250440120697},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.33153408765792847},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.11004814505577087},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.10716453194618225},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/cicc48029.2020.9075897","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc48029.2020.9075897","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 IEEE Custom Integrated Circuits Conference (CICC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8899999856948853}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W2148769415","https://openalex.org/W2292416786","https://openalex.org/W2594329240","https://openalex.org/W2781597976","https://openalex.org/W2792189667","https://openalex.org/W2793566101","https://openalex.org/W2794441083","https://openalex.org/W2921623970"],"related_works":["https://openalex.org/W1576949837","https://openalex.org/W4360861688","https://openalex.org/W3134930219","https://openalex.org/W984417604","https://openalex.org/W2967785526","https://openalex.org/W2936029881","https://openalex.org/W2072077388","https://openalex.org/W4378381217","https://openalex.org/W2143576345","https://openalex.org/W2094813099"],"abstract_inverted_index":{"This":[0,102],"paper":[1],"presents":[2],"an":[3],"ultra-low":[4],"power":[5,23,83,104],"digitally-assisted":[6],"analog":[7],"ring":[8],"phase-locked":[9],"loop":[10,17],"(PLL)":[11],"with":[12,34,61,80],"a":[13,22,48,62,92],"tunable":[14],"switched":[15],"capacitor":[16],"filter.":[18],"The":[19],"PLL":[20],"achieves":[21],"efficiency":[24,84],"of":[25,29,85],"0.213mW/GHz":[26],"and":[27,52,111],"FoM":[28],"-234.4dB":[30],"at.":[31],"08V":[32],"supply":[33,50,60],"only":[35],"200ns":[36],"lock":[37],"time":[38],"at":[39],"100MHz":[40],"reference":[41,94],"clock.":[42],"All":[43],"the":[44],"components":[45],"are":[46],"using":[47],"single":[49],"voltage":[51],"it":[53,75],"can":[54,76,89],"operate":[55],"from":[56,68,98],"0.5V":[57,73],"to":[58,70,100],"0.9V":[59],"wide":[63,93],"output":[64],"clock":[65,95],"frequency":[66,96],"range":[67,97],"0.2GHz":[69],"5GHz.":[71],"At":[72],"supply,":[74],"support":[77,91],"1.6GHz":[78],"operation":[79],"very":[81],"high":[82],"0.08m":[86],"W/GHz.":[87],"It":[88],"also":[90],"20MHz":[99],"200MHz.":[101],"low":[103],"design":[105],"is":[106],"suitable":[107],"for":[108],"System-on-Chip":[109],"(SoC)":[110],"Internet-of-":[112],"Things":[113],"(IoT)":[114],"processors.":[115]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":5},{"year":2023,"cited_by_count":2},{"year":2021,"cited_by_count":6},{"year":2020,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}